Searched refs:REG_HDCP_TX_AN_08 (Results 1 – 12 of 12) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/ |
| H A D | halHDCPTx.c | 518 temp = MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i); in MHal_HDMITx_HdcpWriteAn()
544 …MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i, (TxHdcpAnTbl[2*i+1] <<8) | (TxHdcpAnT… in MHal_HDMITx_HdcpWriteAn()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/ |
| H A D | halHDCPTx.c | 497 temp = MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i); in MHal_HDMITx_HdcpWriteAn()
523 …MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i, (TxHdcpAnTbl[2*i+1] <<8) | (TxHdcpAnT… in MHal_HDMITx_HdcpWriteAn()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/ |
| H A D | halHDCPTx.c | 518 temp = MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i); in MHal_HDMITx_HdcpWriteAn()
544 …MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i, (TxHdcpAnTbl[2*i+1] <<8) | (TxHdcpAnT… in MHal_HDMITx_HdcpWriteAn()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/ |
| H A D | halHDCPTx.c | 518 temp = MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i); in MHal_HDMITx_HdcpWriteAn()
544 …MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i, (TxHdcpAnTbl[2*i+1] <<8) | (TxHdcpAnT… in MHal_HDMITx_HdcpWriteAn()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/ |
| H A D | halHDCPTx.c | 518 temp = MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i); in MHal_HDMITx_HdcpWriteAn()
544 …MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i, (TxHdcpAnTbl[2*i+1] <<8) | (TxHdcpAnT… in MHal_HDMITx_HdcpWriteAn()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/ |
| H A D | halHDCPTx.c | 518 temp = MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i); in MHal_HDMITx_HdcpWriteAn()
544 …MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_AN_08+i, (TxHdcpAnTbl[2*i+1] <<8) | (TxHdcpAnT… in MHal_HDMITx_HdcpWriteAn()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/include/ |
| H A D | regHDMITx.h | 381 #define REG_HDCP_TX_AN_08 0x08U // An[63:0] : 68[7:0] ~ 6B[15:8] macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/include/ |
| H A D | regHDMITx.h | 381 #define REG_HDCP_TX_AN_08 0x08U // An[63:0] : 68[7:0] ~ 6B[15:8] macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/include/ |
| H A D | regHDMITx.h | 381 #define REG_HDCP_TX_AN_08 0x08U // An[63:0] : 68[7:0] ~ 6B[15:8] macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/include/ |
| H A D | regHDMITx.h | 381 #define REG_HDCP_TX_AN_08 0x08U // An[63:0] : 68[7:0] ~ 6B[15:8] macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/include/ |
| H A D | regHDMITx.h | 391 #define REG_HDCP_TX_AN_08 0x08U // An[63:0] : 68[7:0] ~ 6B[15:8] macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/include/ |
| H A D | regHDMITx.h | 391 #define REG_HDCP_TX_AN_08 0x08U // An[63:0] : 68[7:0] ~ 6B[15:8] macro
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