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Searched refs:REG_HDCP_DUAL_P0_01_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1902 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3611 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3632 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3640 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3662 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3703 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3711 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3749 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3757 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3789 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1902 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3614 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3635 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3643 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3665 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3706 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3714 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3752 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3760 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3792 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1902 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3614 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3635 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3643 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3665 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3706 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3714 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3752 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
3760 W2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset, 0xFFFF); in _Hal_tmds_PowerSavingStateProc()
3792 usValue = R2BYTE(REG_HDCP_DUAL_P0_01_L +ulMACBankOffset); in _Hal_tmds_PowerSavingStateProc()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c947 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
2389 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L, 0xFF00 ); in Hal_HDCP_clearflag()
2400 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L); in Hal_HDCP_getstatus()
4512 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c746 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
1662 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L, 0xFF00 ); in Hal_HDCP_clearflag()
1673 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L); in Hal_HDCP_getstatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1891 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3665 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, 0xFF00 ); in Hal_HDCP_clearflag()
3685 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6178 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1921 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3781 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L +u16bank_offset, 0xFF00); in Hal_HDCP_clearflag()
3793 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6223 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1960 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3731 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, 0xFF00 ); in Hal_HDCP_clearflag()
3756 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6301 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1921 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3781 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L +u16bank_offset, 0xFF00); in Hal_HDCP_clearflag()
3793 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6223 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1967 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3682 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, 0xFF00 ); in Hal_HDCP_clearflag()
3702 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6299 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1960 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3731 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, 0xFF00 ); in Hal_HDCP_clearflag()
3756 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6301 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c2060 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3871 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, 0xFF00 ); in Hal_HDCP_clearflag()
3891 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6669 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c2060 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
3871 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, 0xFF00 ); in Hal_HDCP_clearflag()
3891 u16hdcp_status = HDCP_R2BYTE(REG_HDCP_DUAL_P0_01_L + u16bank_offset); in Hal_HDCP_getstatus()
6669 HDCP_W2BYTE(REG_HDCP_DUAL_P0_01_L+u16bank_offset, usInt << 8); in Hal_HDCP_ClearStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3891 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3891 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3891 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3891 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h3890 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h3889 #define REG_HDCP_DUAL_P0_01_L (REG_HDCP_DUAL_P0_BASE + 0x02) macro

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