REG_FSC_BK20_C1 (reference) in projects: utopia

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Searched refs:REG_FSC_BK20_C1 (Results 1 – 25 of 34) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A D	Maserati_2D_4K2K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 443 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 444 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 445 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 446 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() 447 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() [all …]
H A D	Maserati_2D_FHD.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 443 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_FHD_2D_FHD_YUV() 444 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_FHD_2D_FHD_YUV() 445 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_FHD_2D_FHD_YUV() 446 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_FHD_2D_FHD_YUV() 447 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_FHD_2D_FHD_YUV()
H A D	Maserati_2D_480.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_480_2D_480_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_480_2D_480_RGB_BYPASS() 472 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_480_2D_480_YUV() 473 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_480_2D_480_YUV() 474 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_480_2D_480_YUV() 475 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_480_2D_480_YUV() 476 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_480_2D_480_YUV()
H A D	Maserati_2D_576.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_576_2D_576_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_576_2D_576_RGB_BYPASS() 472 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_576_2D_576_YUV() 473 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_576_2D_576_YUV() 474 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_576_2D_576_YUV() 475 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_576_2D_576_YUV() 476 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_576_2D_576_YUV()
H A D	Maserati_2D_720.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_720_2D_720_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_720_2D_720_RGB_BYPASS() 472 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_720_2D_720_YUV() 473 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_720_2D_720_YUV() 474 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_720_2D_720_YUV() 475 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_720_2D_720_YUV() 476 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_720_2D_720_YUV()
H A D	Maserati_ACT_4K0_5K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()
H A D	Maserati_FRC_ACT_4K1K_LLRR_240.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()
H A D	Maserati_ACT_4K1K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()
H A D	Maserati_FRC_ACT_4K2K_120.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()
H A D	Maserati_FRC_PAS_4K2K_120.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()
H A D	Maserati_FRC_ACT_4K0_5K_LLRR_240.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
H A D	Maserati_FRC_ACT_4K1K_120.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A D	Maserati_2D_4K2K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 443 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 444 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 445 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 446 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() 447 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() [all …]
H A D	Maserati_2D_FHD.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 443 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_FHD_2D_FHD_YUV() 444 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_FHD_2D_FHD_YUV() 445 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_FHD_2D_FHD_YUV() 446 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_FHD_2D_FHD_YUV() 447 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_FHD_2D_FHD_YUV()
H A D	Maserati_2D_720.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_720_2D_720_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_720_2D_720_RGB_BYPASS() 472 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_720_2D_720_YUV() 473 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_720_2D_720_YUV() 474 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_720_2D_720_YUV() 475 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_720_2D_720_YUV() 476 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_720_2D_720_YUV()
H A D	Maserati_2D_480.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_480_2D_480_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_480_2D_480_RGB_BYPASS() 472 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_480_2D_480_YUV() 473 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_480_2D_480_YUV() 474 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_480_2D_480_YUV() 475 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_480_2D_480_YUV() 476 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_480_2D_480_YUV()
H A D	Maserati_2D_576.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_576_2D_576_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_576_2D_576_RGB_BYPASS() 472 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_576_2D_576_YUV() 473 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_576_2D_576_YUV() 474 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_576_2D_576_YUV() 475 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_576_2D_576_YUV() 476 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_576_2D_576_YUV()
H A D	Maserati_ACT_4K1K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()
H A D	Maserati_FRC_ACT_4K2K_120.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()
H A D	Maserati_FRC_ACT_4K0_5K_LLRR_240.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
H A D	Maserati_FRC_PAS_4K2K_60.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB()
H A D	Maserati_FRC_ACT_4K1K_120.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()
H A D	Maserati_FRC_PAS_4K2K_120.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A D	Manhattan_2D_4K2K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 490 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 491 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 492 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 493 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() 494 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() [all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A D	Manhattan_2D_4K2K.c	22 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 23 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 24 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 25 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 26 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 490 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x04, 0x04); // reg_de_h_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 491 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x08, 0x08); // reg_de_v_mask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 492 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x10); // reg_hvmask_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 493 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x20); // reg_mask_hcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() 494 MDrv_WriteByteMask( REG_FSC_BK20_C1, 0x00, 0x40); // reg_mask_vcnt_sel in MFC_3D_2D_4K2K_2D_FHD_YUV() [all …]