Home
last modified time | relevance | path

Searched refs:REG_FSC_BK20_22 (Results 1 – 25 of 34) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A DMaserati_2D_4K2K.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS()
463 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV()
884 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS()
1305 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
1726 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS()
2147 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_2205_YUV()
H A DMaserati_2D_FHD.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS()
463 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_FHD_2D_FHD_YUV()
H A DMaserati_2D_480.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_480_2D_480_RGB_BYPASS()
492 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_480_2D_480_YUV()
H A DMaserati_2D_576.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_576_2D_576_RGB_BYPASS()
492 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_576_2D_576_YUV()
H A DMaserati_2D_720.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_720_2D_720_RGB_BYPASS()
492 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_720_2D_720_YUV()
H A DMaserati_ACT_4K0_5K.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()
H A DMaserati_FRC_ACT_4K1K_LLRR_240.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()
H A DMaserati_ACT_4K1K.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()
H A DMaserati_FRC_ACT_4K2K_120.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()
H A DMaserati_FRC_PAS_4K2K_120.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()
H A DMaserati_FRC_ACT_4K0_5K_LLRR_240.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
H A DMaserati_FRC_ACT_4K1K_120.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A DMaserati_2D_4K2K.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS()
463 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV()
884 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS()
1305 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
1726 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS()
2147 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_2205_YUV()
H A DMaserati_2D_FHD.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS()
463 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_FHD_2D_FHD_YUV()
H A DMaserati_2D_720.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_720_2D_720_RGB_BYPASS()
492 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_720_2D_720_YUV()
H A DMaserati_2D_480.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_480_2D_480_RGB_BYPASS()
492 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_480_2D_480_YUV()
H A DMaserati_2D_576.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_576_2D_576_RGB_BYPASS()
492 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_576_2D_576_YUV()
H A DMaserati_ACT_4K1K.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()
H A DMaserati_FRC_ACT_4K2K_120.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()
H A DMaserati_FRC_ACT_4K0_5K_LLRR_240.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
H A DMaserati_FRC_PAS_4K2K_60.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB()
H A DMaserati_FRC_ACT_4K1K_120.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()
H A DMaserati_FRC_PAS_4K2K_120.c42 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A DManhattan_2D_4K2K.c41 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS()
509 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV()
977 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS()
1445 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A DManhattan_2D_4K2K.c41 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS()
509 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x38, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_FHD_YUV()
977 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS()
1445 MDrv_WriteByteMask( REG_FSC_BK20_22, 0x70, 0xff); // reg_vlen in MFC_3D_2D_4K2K_2D_4K2K_YUV()

12