REG_FSC_BK1B_11 (reference) in projects: utopia

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched refs:REG_FSC_BK1B_11 (Results 1 – 25 of 34) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A D	Maserati_2D_4K2K.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 511 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 512 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 513 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 932 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 933 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 934 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1353 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() [all …]
H A D	Maserati_2D_FHD.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 511 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_YUV() 512 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_FHD_2D_FHD_YUV() 513 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_YUV()
H A D	Maserati_2D_480.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 540 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_YUV() 541 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_480_2D_480_YUV() 542 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_YUV()
H A D	Maserati_2D_576.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 540 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_YUV() 541 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_576_2D_576_YUV() 542 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_YUV()
H A D	Maserati_2D_720.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 540 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_YUV() 541 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_720_2D_720_YUV() 542 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_YUV()
H A D	Maserati_ACT_4K0_5K.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()`
H A D	Maserati_FRC_ACT_4K1K_LLRR_240.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maserati_ACT_4K1K.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()`
H A D	Maserati_FRC_ACT_4K2K_120.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()`
H A D	Maserati_FRC_PAS_4K2K_120.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()`
H A D	Maserati_FRC_ACT_4K0_5K_LLRR_240.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maserati_FRC_ACT_4K1K_120.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A D	Maserati_2D_4K2K.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 511 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 512 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 513 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 932 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 933 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 934 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1353 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() [all …]
H A D	Maserati_2D_FHD.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 511 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_YUV() 512 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_FHD_2D_FHD_YUV() 513 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_FHD_2D_FHD_YUV()
H A D	Maserati_2D_720.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 540 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_YUV() 541 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_720_2D_720_YUV() 542 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_720_2D_720_YUV()
H A D	Maserati_2D_480.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 540 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_YUV() 541 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_480_2D_480_YUV() 542 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_480_2D_480_YUV()
H A D	Maserati_2D_576.c	90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 540 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_YUV() 541 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_576_2D_576_YUV() 542 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_576_2D_576_YUV()
H A D	Maserati_ACT_4K1K.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()`
H A D	Maserati_FRC_ACT_4K2K_120.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()`
H A D	Maserati_FRC_ACT_4K0_5K_LLRR_240.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maserati_FRC_PAS_4K2K_60.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_PAS_4K2K_60_3D_FHD_TB()`
H A D	Maserati_FRC_ACT_4K1K_120.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()`
H A D	Maserati_FRC_PAS_4K2K_120.c	`90 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 91 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 92 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A D	Manhattan_2D_4K2K.c	101 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 102 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 103 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 569 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 570 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 571 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 1037 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1038 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1039 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1505 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() [all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A D	Manhattan_2D_4K2K.c	101 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 102 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 103 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 569 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 570 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 571 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 1037 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1038 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x02); // reg_sub_h_mirror_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1039 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x00, 0x40); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1505 MDrv_WriteByteMask( REG_FSC_BK1B_11, 0x41, 0x01); // reg_sub_444to422_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() [all …]