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Searched refs:REG_DVI_RSV_DUAL_P1_05_L (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1818 W2BYTEMSK(REG_DVI_RSV_DUAL_P1_05_L, 0, BIT(15)); in _Hal_tmds_AutoEQFunctionEnable()
1828 W2BYTEMSK(REG_DVI_RSV_DUAL_P1_05_L, BIT(15), BIT(15)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1818 W2BYTEMSK(REG_DVI_RSV_DUAL_P1_05_L, 0, BIT(15)); in _Hal_tmds_AutoEQFunctionEnable()
1828 W2BYTEMSK(REG_DVI_RSV_DUAL_P1_05_L, BIT(15), BIT(15)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1818 W2BYTEMSK(REG_DVI_RSV_DUAL_P1_05_L, 0, BIT(15)); in _Hal_tmds_AutoEQFunctionEnable()
1828 W2BYTEMSK(REG_DVI_RSV_DUAL_P1_05_L, BIT(15), BIT(15)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4367 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4369 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4365 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4369 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4365 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4369 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4369 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4365 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4366 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4365 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4367 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4367 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4367 #define REG_DVI_RSV_DUAL_P1_05_L (REG_DVI_RSV_DUAL_P1_BASE + 0x0A) macro