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Searched refs:REG_DVI_PS_12_L (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h927 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h927 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c2882 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c2420 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c2420 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c3619 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c5237 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c5337 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c5379 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c5337 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c5352 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c5379 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c5940 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c5943 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c5650 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c5946 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c5650 …)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) & BIT(6)) && (R2BYTE(REG_DVI_PS_12_L+u8reg_offset)… in Hal_DVI_IMMESWITCH_PS_SW_Path()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h909 #define REG_DVI_PS_12_L (REG_DVI_PS_BASE + 0x24) macro

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