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Searched refs:REG_DVI_DTOP_DUAL_P3_59_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1633 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1641 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1649 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1663 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1671 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1679 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1702 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1710 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1718 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1663 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1671 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1679 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1709 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1717 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1725 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1702 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1710 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1718 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1636 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1644 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1652 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1636 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1644 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1652 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1802 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1810 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1818 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1636 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1644 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1652 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1802 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1810 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1818 if(R2BYTE(REG_DVI_DTOP_DUAL_P3_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h5351 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h5343 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h5351 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h5343 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h5351 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h5351 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h5343 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h5344 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h5343 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_59_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB2) macro