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Searched refs:REG_DVI_DTOP_DUAL_P3_58_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1631 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1639 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1647 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1661 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1669 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1677 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1700 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1708 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1716 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1661 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1669 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1677 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1707 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1715 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1723 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1700 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1708 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1716 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1634 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1642 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1650 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1634 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1642 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1650 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1800 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1808 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1816 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1634 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1642 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1650 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1800 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1808 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1816 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h5347 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h5341 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h5341 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h5349 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h5341 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h5342 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h5341 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h5347 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h5347 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h5347 #define REG_DVI_DTOP_DUAL_P3_58_L (REG_DVI_DTOP_DUAL_P3_BASE + 0xB0) macro