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Searched refs:REG_DVI_DTOP_DUAL_P3_2A_L (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c234 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
257 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
280 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
295 … W2BYTE(REG_DVI_DTOP_DUAL_P3_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h5255 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h5257 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h5249 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h5257 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h5249 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h5257 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h5257 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h5249 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h5250 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h5249 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h5255 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h5255 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h5255 #define REG_DVI_DTOP_DUAL_P3_2A_L (REG_DVI_DTOP_DUAL_P3_BASE + 0x54) macro