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Searched refs:REG_DVI_DTOP_DUAL_P2_58_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1588 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1596 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1604 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1618 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1626 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1634 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1657 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1665 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1673 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1618 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1626 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1634 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1664 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1672 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1680 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1657 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1665 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1673 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1591 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1599 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1607 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1591 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1599 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1607 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1757 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1765 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1773 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1591 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1599 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1607 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1757 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1765 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1773 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4811 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4813 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4807 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4813 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4807 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4813 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4813 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4807 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4808 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4807 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4811 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4811 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4811 #define REG_DVI_DTOP_DUAL_P2_58_L (REG_DVI_DTOP_DUAL_P2_BASE + 0xB0) macro