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Searched refs:REG_DVI_DTOP_DUAL_P1_59_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1547 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1555 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1563 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1577 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1585 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1593 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1616 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1624 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1632 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1577 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1585 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1593 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1623 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1631 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1639 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1616 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1624 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1632 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1550 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1558 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1566 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1550 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1558 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1566 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1716 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1724 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1732 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1550 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1558 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1566 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1716 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1724 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
1732 if(R2BYTE(REG_DVI_DTOP_DUAL_P1_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4279 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4279 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4279 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4279 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4276 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_59_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB2) macro