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Searched refs:REG_DVI_DTOP_DUAL_P1_58_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1545 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1553 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1561 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1575 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1583 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1591 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1614 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1622 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1630 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1575 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1583 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1591 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1621 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1629 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1637 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1614 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1622 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1630 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1548 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1556 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1564 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1548 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1556 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1564 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1714 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1722 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1730 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1548 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1556 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1564 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1714 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFE00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1722 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFD00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
1730 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_58_L, 0xFC00, BMASK(15:0)); in _Hal_tmds_GetErrorCountStatus14()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4273 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4273 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4277 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4273 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4274 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4273 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4275 #define REG_DVI_DTOP_DUAL_P1_58_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xB0) macro