| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 3149 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: t… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 5535 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 3886 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: t… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 6244 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 6241 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 5956 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 5956 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 6238 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_mux.c | 227 … W2BYTE(REG_DVI_DTOP_DUAL_P0_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux() 253 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 278 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux() 303 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: tu… in Hal_SC_mux_set_dvi_mux()
|
| H A D | mhal_hdmi.c | 5650 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 5610 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 5689 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 5610 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 5689 …W2BYTEMSK( REG_DVI_DTOP_DUAL_P0_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated (r-ch),… in Hal_DVI_ForceAllPortsEnterPS()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 3647 #define REG_DVI_DTOP_DUAL_P0_2A_L (REG_DVI_DTOP_DUAL_P0_BASE + 0x54) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 3649 #define REG_DVI_DTOP_DUAL_P0_2A_L (REG_DVI_DTOP_DUAL_P0_BASE + 0x54) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 3647 #define REG_DVI_DTOP_DUAL_P0_2A_L (REG_DVI_DTOP_DUAL_P0_BASE + 0x54) macro
|