Home
last modified time | relevance | path

Searched refs:REG_DVI_DTOP_13_L (Results 1 – 17 of 17) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c1241 … W2BYTEMSK(REG_DVI_DTOP_13_L, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_tol * 4 in Hal_HDMI_init()
1242 …W2BYTEMSK(REG_DVI_DTOP_13_L+0x2900, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_t… in Hal_HDMI_init()
1243 …W2BYTEMSK(REG_DVI_DTOP_13_L+0x2B00, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_t… in Hal_HDMI_init()
1244 …W2BYTEMSK(REG_DVI_DTOP_13_L+0x2D00, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_t… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c1241 … W2BYTEMSK(REG_DVI_DTOP_13_L, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_tol * 4 in Hal_HDMI_init()
1242 …W2BYTEMSK(REG_DVI_DTOP_13_L+0x2900, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_t… in Hal_HDMI_init()
1243 …W2BYTEMSK(REG_DVI_DTOP_13_L+0x2B00, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_t… in Hal_HDMI_init()
1244 …W2BYTEMSK(REG_DVI_DTOP_13_L+0x2D00, (0x2<<12)|0xC80, BMASK(14:0)); //the comp value is reg_comp_t… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h140 #define REG_DVI_DTOP_13_L (REG_DVI_DTOP_BASE + 0x26) macro