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Searched refs:REG_DVI_DTOP_12_L (Results 1 – 17 of 17) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c1245 …W2BYTEMSK(REG_DVI_DTOP_12_L, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detection count… in Hal_HDMI_init()
1246 …W2BYTEMSK(REG_DVI_DTOP_12_L+0x2900, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detectio… in Hal_HDMI_init()
1247 …W2BYTEMSK(REG_DVI_DTOP_12_L+0x2B00, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detectio… in Hal_HDMI_init()
1248 …W2BYTEMSK(REG_DVI_DTOP_12_L+0x2D00, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detectio… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c1245 …W2BYTEMSK(REG_DVI_DTOP_12_L, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detection count… in Hal_HDMI_init()
1246 …W2BYTEMSK(REG_DVI_DTOP_12_L+0x2900, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detectio… in Hal_HDMI_init()
1247 …W2BYTEMSK(REG_DVI_DTOP_12_L+0x2B00, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detectio… in Hal_HDMI_init()
1248 …W2BYTEMSK(REG_DVI_DTOP_12_L+0x2D00, (0xF<<12), BMASK(15:12)); //0x110A25=0xB0, DVI clock detectio… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h138 #define REG_DVI_DTOP_12_L (REG_DVI_DTOP_BASE + 0x24) macro