| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 2809 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 2814 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 2820 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 3546 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 3551 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 3557 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 3685 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(14)| BIT(6), BIT(14)| BIT(6)); in Hal_HDMI_StablePolling() 3687 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(14)| BIT(6)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 3685 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(14)| BIT(6), BIT(14)| BIT(6)); in Hal_HDMI_StablePolling() 3687 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(14)| BIT(6)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 5168 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5173 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5179 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 5268 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5273 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5279 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 5306 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5311 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5317 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 5268 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5273 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5279 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 5279 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5284 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5290 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 5306 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5311 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5317 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 5871 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5876 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5882 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 5874 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5879 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5885 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 5577 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5582 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5588 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 5877 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5882 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5888 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 5577 W2BYTEMSK(REG_DVI_DTOP2_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5582 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5588 W2BYTEMSK(REG_DVI_DTOP2_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 310 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 310 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 304 #define REG_DVI_DTOP2_24_L (REG_DVI_DTOP2_BASE + 0x48) macro
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