| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_mux.c | 237 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_SC_mux_set_dvi_mux()
266 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
269 … W2BYTE( REG_DVI_DTOP1_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
309 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_SC_mux_set_dvi_mux()
344 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_SC_mux_set_dvi_mux()
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| H A D | mhal_hdmi.c | 1133 W2BYTE( REG_DVI_DTOP1_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_HDMI_init()
1157 W2BYTE( REG_DVI_DTOP1_2A_L, 0xE3E3); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_HDMI_init()
2699 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_DVI_ForceAllPortsEnterPS()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_mux.c | 237 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_SC_mux_set_dvi_mux()
266 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
269 … W2BYTE( REG_DVI_DTOP1_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_SC_mux_set_dvi_mux()
309 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_SC_mux_set_dvi_mux()
344 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_SC_mux_set_dvi_mux()
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| H A D | mhal_hdmi.c | 1133 W2BYTE( REG_DVI_DTOP1_2A_L, 0); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_HDMI_init()
1157 W2BYTE( REG_DVI_DTOP1_2A_L, 0xE3E3); // [15:8]: update Rch slowly, [7:0]:update Gch slowly in Hal_HDMI_init()
2699 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0, BIT(15)|BIT(7)); // [15]: turn off slowly updated, [7]: turn off… in Hal_DVI_ForceAllPortsEnterPS()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_mux.c | 246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 267 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 267 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_2A_L (REG_DVI_DTOP1_BASE + 0x54) macro
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