| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 2728 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
2733 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
2739 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 3465 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
3470 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
3476 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 3570 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(6), BIT(6)); in Hal_HDMI_StablePolling()
3572 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(6)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 3570 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(6), BIT(6)); in Hal_HDMI_StablePolling()
3572 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(6)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 5087 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5092 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5098 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 5187 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5192 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5198 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 5225 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5230 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5236 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 5187 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5192 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5198 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 5198 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5203 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5209 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 5225 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5230 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5236 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 5790 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5795 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5801 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 5793 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5798 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5804 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 5496 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5501 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5507 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 5796 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5801 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5807 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 5496 W2BYTEMSK(REG_DVI_DTOP1_25_L, BIT(5), BIT(5)); in Hal_DVI_HF_adjust()
5501 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
5507 W2BYTEMSK(REG_DVI_DTOP1_25_L, 0, BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 263 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 259 #define REG_DVI_DTOP1_25_L (REG_DVI_DTOP1_BASE + 0x4A) macro
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