| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 2727 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 2732 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 2738 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 3464 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 3469 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 3475 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 3569 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(14)| BIT(6), BIT(14)| BIT(6)); in Hal_HDMI_StablePolling() 3571 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(14)| BIT(6)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 3569 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(14)| BIT(6), BIT(14)| BIT(6)); in Hal_HDMI_StablePolling() 3571 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(14)| BIT(6)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 5086 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5091 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5097 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 5186 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5191 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5197 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 5224 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5229 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5235 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 5186 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5191 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5197 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 5197 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5202 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5208 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 5224 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5229 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5235 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 5789 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5794 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5800 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 5792 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5797 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5803 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 5495 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5500 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5506 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 5795 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5800 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5806 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 5495 W2BYTEMSK(REG_DVI_DTOP1_24_L, BIT(13)|BIT(5), BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5500 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust() 5506 W2BYTEMSK(REG_DVI_DTOP1_24_L, 0, BIT(13)|BIT(5)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 261 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 261 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 257 #define REG_DVI_DTOP1_24_L (REG_DVI_DTOP1_BASE + 0x48) macro
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