| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 1188 W2BYTEMSK(REG_DVI_DTOP1_1E_L, BIT(4), BIT(4)); // enable DVI port1 Vsync glitch filter in Hal_HDMI_init()
1205 W2BYTEMSK(REG_DVI_DTOP1_1E_L, 0x00, BMASK(3:0)); // [3:0]: Timer for HDMI report in Hal_HDMI_init()
1216 W2BYTEMSK(REG_DVI_DTOP1_1E_L, BIT(3), BMASK(3:0)); // timer baased on Xtal = 12Mhz in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 1188 W2BYTEMSK(REG_DVI_DTOP1_1E_L, BIT(4), BIT(4)); // enable DVI port1 Vsync glitch filter in Hal_HDMI_init()
1205 W2BYTEMSK(REG_DVI_DTOP1_1E_L, 0x00, BMASK(3:0)); // [3:0]: Timer for HDMI report in Hal_HDMI_init()
1216 W2BYTEMSK(REG_DVI_DTOP1_1E_L, BIT(3), BMASK(3:0)); // timer baased on Xtal = 12Mhz in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 254 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 254 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_hdmi.h | 252 #define REG_DVI_DTOP1_1E_L (REG_DVI_DTOP1_BASE + 0x3C) macro
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