| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_mux.c | 379 W2BYTEMSK(REG_DVI_ATOP_60_L, 0, 0xFFFF); // enable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
392 W2BYTE(REG_DVI_ATOP_60_L, 0); // enable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
412 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
425 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
445 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
458 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
478 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
491 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
511 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
524 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
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| H A D | mhal_offline.c | 362 MS_U16 u16DVIATOP_60 = R2BYTE(REG_DVI_ATOP_60_L); in Hal_XC_GetOffLineOfDVI0()
367 W2BYTE(REG_DVI_ATOP_60_L, 0); // enable DVI0 PLL power in Hal_XC_GetOffLineOfDVI0()
383 W2BYTE(REG_DVI_ATOP_60_L, u16DVIATOP_60); in Hal_XC_GetOffLineOfDVI0()
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| H A D | mhal_hdmi.c | 1097 W2BYTE(REG_DVI_ATOP_60_L, 0x0000); // enable DVI0 PLL power in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_mux.c | 379 W2BYTEMSK(REG_DVI_ATOP_60_L, 0, 0xFFFF); // enable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
392 W2BYTE(REG_DVI_ATOP_60_L, 0); // enable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
412 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
425 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
445 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
458 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
478 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
491 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
511 …W2BYTEMSK(REG_DVI_ATOP_60_L, 0xFFDF, 0xFFDF); // disable DVI0 PLL power, DVIPLL regulator should b… in Hal_SC_mux_set_dvi_mux()
524 W2BYTE(REG_DVI_ATOP_60_L, 0xFFFF); // disable DVI0 PLL power in Hal_SC_mux_set_dvi_mux()
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| H A D | mhal_offline.c | 362 MS_U16 u16DVIATOP_60 = R2BYTE(REG_DVI_ATOP_60_L); in Hal_XC_GetOffLineOfDVI0()
367 W2BYTE(REG_DVI_ATOP_60_L, 0); // enable DVI0 PLL power in Hal_XC_GetOffLineOfDVI0()
383 W2BYTE(REG_DVI_ATOP_60_L, u16DVIATOP_60); in Hal_XC_GetOffLineOfDVI0()
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| H A D | mhal_hdmi.c | 1097 W2BYTE(REG_DVI_ATOP_60_L, 0x0000); // enable DVI0 PLL power in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/ |
| H A D | halMHL.c | 734 W2BYTEMSK(REG_DVI_ATOP_60_L, 0, BMASK(13:11));// data R-term in _mhal_mhl_RxRtermControl()
739 W2BYTEMSK(REG_DVI_ATOP_60_L, BMASK(13:12), BMASK(13:11));// data R-term in _mhal_mhl_RxRtermControl()
744 W2BYTEMSK(REG_DVI_ATOP_60_L, BMASK(13:11), BMASK(13:11));// data R-term in _mhal_mhl_RxRtermControl()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/ |
| H A D | halMHL.c | 734 W2BYTEMSK(REG_DVI_ATOP_60_L, 0, BMASK(13:11));// data R-term in _mhal_mhl_RxRtermControl()
739 W2BYTEMSK(REG_DVI_ATOP_60_L, BMASK(13:12), BMASK(13:11));// data R-term in _mhal_mhl_RxRtermControl()
744 W2BYTEMSK(REG_DVI_ATOP_60_L, BMASK(13:11), BMASK(13:11));// data R-term in _mhal_mhl_RxRtermControl()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| H A D | hwreg_hdmi.h | 725 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| H A D | hwreg_hdmi.h | 725 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_dvi_atop.h | 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) macro
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