Home
last modified time | relevance | path

Searched refs:REG_DVI_ATOP_5E_L (Results 1 – 25 of 47) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c2667 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2672 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2677 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2682 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl … in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c3476 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
3481 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
3486 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_MEDIUM, BMASK(4:0)); //[4]: ICtrl overwr… in Hal_HDMI_StablePolling()
3491 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_LOW, BMASK(4:0)); //[4]: ICtrl overwrite… in Hal_HDMI_StablePolling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c3476 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
3481 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
3486 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_MEDIUM, BMASK(4:0)); //[4]: ICtrl overwr… in Hal_HDMI_StablePolling()
3491 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_LOW, BMASK(4:0)); //[4]: ICtrl overwrite… in Hal_HDMI_StablePolling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c3404 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3409 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3414 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3419 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl … in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_dvi_atop.h290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhalMHL.c407 …W2BYTEMSK(REG_DVI_ATOP_5E_L, 0, BMASK(4:0)); //[4]: overwrtie DPL ICTL value, [3:0]: ictl overwrti… in _mhal_mhl_HdmiBypassModeSetting()
540 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| ucIControlValue, BMASK(4:0)); //[4]: overwrtie DPL ICTL value… in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhalMHL.c407 …W2BYTEMSK(REG_DVI_ATOP_5E_L, 0, BMASK(4:0)); //[4]: overwrtie DPL ICTL value, [3:0]: ictl overwrti… in _mhal_mhl_HdmiBypassModeSetting()
540 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)| ucIControlValue, BMASK(4:0)); //[4]: overwrtie DPL ICTL value… in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c5026 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5031 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5036 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5041 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl … in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c5126 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5131 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5136 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5141 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl … in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c5164 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5169 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5174 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5179 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl … in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c5126 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5131 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5136 … W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5141 …W2BYTEMSK(REG_DVI_ATOP_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl … in Hal_DVI_HF_adjust()

12