| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 1335 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(12), BMASK(13:12)); // Port A in Hal_HDMI_init()
3475 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_HIGH << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
3480 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_MEDIUM << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
3485 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_LOW << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
3490 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_LOW << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 1335 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(12), BMASK(13:12)); // Port A in Hal_HDMI_init()
3475 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_HIGH << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
3480 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_MEDIUM << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
3485 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_LOW << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
3490 W2BYTEMSK(REG_DVI_ATOP_32_L, (HDMI_HF_SETTING_VALUE_LOW << 8), BMASK(9:8)); in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 2666 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); in Hal_DVI_HF_adjust()
2671 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8)); in Hal_DVI_HF_adjust()
2676 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
2681 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/ |
| H A D | halMHL.c | 405 …W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8) |BMASK(6:4) |BMASK(2:0)); // HF, Enable ACDR, Bypa… in _mhal_mhl_HdmiBypassModeSetting()
538 …W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8) |BIT(4) |BIT(0), BMASK(9:8) |BMASK(6:4) |BMASK(2:0)); // HF, E… in _mhal_mhl_Mhl24bitsModeSetting()
665 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); // HF in _mhal_mhl_MhlPackedPixelModeSetting()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/ |
| H A D | halMHL.c | 405 …W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8) |BMASK(6:4) |BMASK(2:0)); // HF, Enable ACDR, Bypa… in _mhal_mhl_HdmiBypassModeSetting()
538 …W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8) |BIT(4) |BIT(0), BMASK(9:8) |BMASK(6:4) |BMASK(2:0)); // HF, E… in _mhal_mhl_Mhl24bitsModeSetting()
665 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); // HF in _mhal_mhl_MhlPackedPixelModeSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 3403 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); in Hal_DVI_HF_adjust()
3408 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8)); in Hal_DVI_HF_adjust()
3413 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
3418 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_dvi_atop.h | 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 5025 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5030 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5035 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
5040 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 5125 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5130 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5135 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
5140 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 5163 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5168 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5173 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
5178 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 5125 W2BYTEMSK(REG_DVI_ATOP_32_L, BMASK(9:8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5130 W2BYTEMSK(REG_DVI_ATOP_32_L, BIT(8), BMASK(9:8)); in Hal_DVI_HF_adjust()
5135 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
5140 W2BYTEMSK(REG_DVI_ATOP_32_L, 0, BMASK(9:8)); in Hal_DVI_HF_adjust()
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