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Searched refs:REG_COMBO_PHY1_P1_49_L (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c2306 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2550 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c2306 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2550 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c2306 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2550 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c2306 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2550 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c2306 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2550 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1013 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1232 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1024 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1243 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1063 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1297 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1024 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1243 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1085 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1304 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1063 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1297 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1016 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1235 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1016 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1235 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1151 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1397 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1016 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1235 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1151 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1397 W2BYTEMSK(REG_COMBO_PHY1_P1_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2417 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2419 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2417 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2419 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2417 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2419 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2419 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2417 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2418 #define REG_COMBO_PHY1_P1_49_L (REG_COMBO_PHY1_P1_BASE + 0x92) macro

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