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Searched refs:REG_COMBO_PHY1_P1_44_L (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c2549 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, bAutoEQEnable? 0: BIT(0), BIT(0)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c2549 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, bAutoEQEnable? 0: BIT(0), BIT(0)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c2549 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, bAutoEQEnable? 0: BIT(0), BIT(0)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c2549 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, bAutoEQEnable? 0: BIT(0), BIT(0)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c2549 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, bAutoEQEnable? 0: BIT(0), BIT(0)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1231 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1242 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1296 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1242 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1303 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1296 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1234 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1234 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1396 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1234 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1396 W2BYTEMSK(REG_COMBO_PHY1_P1_44_L, BIT(0), BIT(0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2407 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2409 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2407 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2409 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2407 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2409 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2409 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2407 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2408 #define REG_COMBO_PHY1_P1_44_L (REG_COMBO_PHY1_P1_BASE + 0x88) macro

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