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Searched refs:REG_COMBO_PHY1_P0_49_L (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c443 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
509 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c2291 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2526 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c2291 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2526 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c2291 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2526 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c2291 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2526 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c593 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
685 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c2291 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2526 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1001 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1220 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1012 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1231 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1051 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1285 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1012 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1231 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1073 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1292 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1051 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1285 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1004 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1223 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1004 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1223 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1139 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1385 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1004 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1223 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1139 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1385 W2BYTEMSK(REG_COMBO_PHY1_P0_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1901 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1903 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1901 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1903 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1901 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1903 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1903 #define REG_COMBO_PHY1_P0_49_L (REG_COMBO_PHY1_P0_BASE + 0x92) macro

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