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Searched refs:REG_COMBO_PHY1_P0_38_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c1970 W2BYTE(REG_COMBO_PHY1_P0_38_L, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c2705 W2BYTE(REG_COMBO_PHY1_P0_38_L, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c4166 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c4275 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c4273 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c4275 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c4217 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c4273 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c4840 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c4843 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c4401 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c4846 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c4401 … W2BYTE(REG_COMBO_PHY1_P0_38_L + u16bank_offset, 0x00FF); // [15:0]: reg_hdmi_symbol_det_times in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1869 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1869 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1869 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1869 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1868 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_38_L (REG_COMBO_PHY1_P0_BASE + 0x70) macro

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