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Searched refs:REG_COMBO_PHY1_P0_37_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c1971 …W2BYTE(REG_COMBO_PHY1_P0_37_L, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]: reg_hdmi_eq_swee… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c2706 …W2BYTE(REG_COMBO_PHY1_P0_37_L, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]: reg_hdmi_eq_swee… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c4167 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c4276 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c4274 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c4276 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c4218 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c4274 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c4841 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c4844 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c4402 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c4847 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c4402 …W2BYTE(REG_COMBO_PHY1_P0_37_L + u16bank_offset, 0x001F); // [7:4]: reg_hdmi_auto_det_times; [3:0]:… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1867 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1866 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1865 #define REG_COMBO_PHY1_P0_37_L (REG_COMBO_PHY1_P0_BASE + 0x6E) macro

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