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Searched refs:REG_COMBO_PHY1_P0_03_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c1252 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
1312 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c1818 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
1878 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c2949 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3009 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c2986 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3046 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c2978 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3038 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c2986 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3046 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c2986 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3046 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c2978 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3038 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c2977 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3037 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c2980 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3040 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c3151 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3211 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c2980 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3040 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c3151 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, BIT(1), BIT(1)); in _Hal_tmds_EQCalibrationProc()
3211 W2BYTEMSK(REG_COMBO_PHY1_P0_03_L, 0, BIT(1)); in _Hal_tmds_EQCalibrationProc()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1762 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06) macro

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