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Searched refs:REG_COMBO_PHY0_P3_29_L (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1038 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1258 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1049 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1269 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1088 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1323 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1049 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1269 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1110 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1330 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1088 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1323 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1041 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1261 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1041 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1261 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1176 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1423 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1041 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1261 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1176 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, bHDMI20Flag? BIT(8): BIT(15), BMASK(15:0)); in _Hal_tmds_HDMI20AutoEQSetting()
1423 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(15), BMASK(15:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c2337 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(8), BMASK(15:0)); in _mhal_mhl_MHL30AutoEQSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c2337 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(8), BMASK(15:0)); in _mhal_mhl_MHL30AutoEQSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c2337 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(8), BMASK(15:0)); in _mhal_mhl_MHL30AutoEQSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c2337 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(8), BMASK(15:0)); in _mhal_mhl_MHL30AutoEQSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c2337 W2BYTEMSK(REG_COMBO_PHY0_P3_29_L, BIT(8), BMASK(15:0)); in _mhal_mhl_MHL30AutoEQSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3127 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3129 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3127 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3129 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3127 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3129 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3129 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h3127 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h3128 #define REG_COMBO_PHY0_P3_29_L (REG_COMBO_PHY0_P3_BASE + 0x52) macro

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