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Searched refs:REG_COMBO_PHY0_P2_6E_L (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c465 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2560 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2568 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
3093 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
3153 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c465 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2560 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2568 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
3093 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
3153 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c465 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2560 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2568 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
3093 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
3153 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c465 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2560 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2568 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
3093 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
3153 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c465 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2560 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2568 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
3093 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
3153 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1829 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1837 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1859 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1867 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1898 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1906 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1859 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1867 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1905 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1913 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1898 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1906 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1836 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1845 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1836 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1845 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1998 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
2006 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1836 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1845 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1998 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
2006 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c462 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2749 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2749 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2749 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2751 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2749 #define REG_COMBO_PHY0_P2_6E_L (REG_COMBO_PHY0_P2_BASE + 0xDC) macro

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