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Searched refs:REG_COMBO_PHY0_P0_6E_L (Results 1 – 25 of 32) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c711 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
719 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1966 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0x0F00, 0x0F00); in Hal_HDMI_init()
1975 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0x00F0, 0x00F0); in Hal_HDMI_init()
2089 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c417 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2512 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2520 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2927 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
2987 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c417 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2512 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2520 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2927 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
2987 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c417 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2512 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2520 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2927 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
2987 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c417 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2512 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2520 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2927 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
2987 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c913 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
921 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
2701 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0x0F00, 0x0F00); in Hal_HDMI_init()
2710 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0x00F0, 0x00F0); in Hal_HDMI_init()
2826 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c417 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2512 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2520 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _mhal_mhl_MHL30AutoEQEnable()
2927 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
2987 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c416 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
2474 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8)); in mhal_mhl_CDRModeMonitor()
2515 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8)); in mhal_mhl_CDRModeMonitor()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1793 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1801 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4162 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4171 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4358 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1823 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1831 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4271 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4280 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4458 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1823 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1831 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4271 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4280 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4458 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1869 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1877 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4213 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4222 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4479 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1796 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1805 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4836 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4845 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
5060 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + ulPHYBankOffset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1796 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1805 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4839 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4848 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
5063 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + ulPHYBankOffset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1962 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1970 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4397 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4406 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4689 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1796 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1805 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4842 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4851 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
5066 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + ulPHYBankOffset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1962 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1970 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4397 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x0F00, 0x0F00); in Hal_HDMI_init()
4406 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4689 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1862 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1870 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4278 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4546 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1862 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
1870 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BMASK(7:4), BMASK(7:4)); in _Hal_tmds_AutoEQFunctionEnable()
4278 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_init()
4546 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L + u16bank_offset, 0x00F0, 0x00F0); in Hal_HDMI_Set_EQ()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1717 #define REG_COMBO_PHY0_P0_6E_L (REG_COMBO_PHY0_P0_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1719 #define REG_COMBO_PHY0_P0_6E_L (REG_COMBO_PHY0_P0_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1717 #define REG_COMBO_PHY0_P0_6E_L (REG_COMBO_PHY0_P0_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1719 #define REG_COMBO_PHY0_P0_6E_L (REG_COMBO_PHY0_P0_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1717 #define REG_COMBO_PHY0_P0_6E_L (REG_COMBO_PHY0_P0_BASE + 0xDC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1719 #define REG_COMBO_PHY0_P0_6E_L (REG_COMBO_PHY0_P0_BASE + 0xDC) macro

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