| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_hdmi.c | 510 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
1940 W2BYTE(REG_COMBO_PHY0_P0_28_L, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 686 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
2675 W2BYTE(REG_COMBO_PHY0_P0_28_L, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 1221 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4136 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 1232 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4245 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 1286 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4249 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 1232 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4245 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 1293 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4187 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 1286 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4249 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 1224 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4813 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 1224 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4816 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 1386 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4371 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 1224 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4819 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 1386 W2BYTEMSK(REG_COMBO_PHY0_P0_28_L, 0, BIT(10)); in _Hal_tmds_AutoEQInitialSetting()
4371 W2BYTE(REG_COMBO_PHY0_P0_28_L + u16bank_offset, 0x3A83); in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 1579 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 1579 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 1579 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 1579 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 1578 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_hdmi.h | 1577 #define REG_COMBO_PHY0_P0_28_L (REG_COMBO_PHY0_P0_BASE + 0x50) macro
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