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Searched refs:REG_COMBO_PHY0_P0_10_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c1954 …W2BYTE(REG_COMBO_PHY0_P0_10_L, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: reg_enable_phase_s… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c2689 …W2BYTE(REG_COMBO_PHY0_P0_10_L, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: reg_enable_phase_s… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c4150 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c4259 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c4263 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0018); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c4259 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c4201 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c4263 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0018); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c4827 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c4830 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c4385 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c4833 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c4385 …W2BYTE(REG_COMBO_PHY0_P0_10_L + u16bank_offset, 0x0008); // [4]: reg_swap_dcdr_updn_polity; [3]: r… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1531 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1531 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1531 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1531 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1530 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1529 #define REG_COMBO_PHY0_P0_10_L (REG_COMBO_PHY0_P0_BASE + 0x20) macro

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