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Searched refs:REG_COMBO_PHY0_P0_0A_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c378 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
1907 W2BYTE(REG_COMBO_PHY0_P0_0A_L, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c475 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
2642 W2BYTE(REG_COMBO_PHY0_P0_0A_L, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c707 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4101 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c718 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4210 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c789 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4215 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c718 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4210 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c779 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4146 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c789 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4215 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c710 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4777 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c710 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4780 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c845 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4337 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c710 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4783 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c845 W2BYTEMSK(REG_COMBO_PHY0_P0_0A_L, BIT(6), BIT(6)); // [6]: reg_af_ls_20out_sel=1 in _Hal_tmds_HDMI20PHYSetting()
4337 W2BYTE(REG_COMBO_PHY0_P0_0A_L + u16bank_offset, 0x0040);// [6]: reg_af_ls_20out_sel=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1519 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1519 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1519 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1519 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1518 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1517 #define REG_COMBO_PHY0_P0_0A_L (REG_COMBO_PHY0_P0_BASE + 0x14) macro

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