Searched refs:REG_CLKGEN1_TSO_OUT_DIVNUM_MASK (Results 1 – 2 of 2) sorted by relevance
180 #define REG_CLKGEN1_TSO_OUT_DIVNUM_MASK 0x001F macro770 …(TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & ~REG_CLKGEN1_TSO_OUT_DIVNUM_MASK) | *pu16ClkOutDivNu… in HAL_TSO_TSOOutDiv()775 … *pu16ClkOutDivNum = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & REG_CLKGEN1_TSO_OUT_DIVNUM_MASK; in HAL_TSO_TSOOutDiv()
182 #define REG_CLKGEN1_TSO_OUT_DIVNUM_MASK 0x001FUL macro846 …(TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & ~REG_CLKGEN1_TSO_OUT_DIVNUM_MASK) | (*pu16ClkOutDivN… in HAL_TSO_TSOOutDiv()851 … *pu16ClkOutDivNum = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_PHASE) & REG_CLKGEN1_TSO_OUT_DIVNUM_MASK; in HAL_TSO_TSOOutDiv()