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Searched refs:REG_CKG_S2_ODCLK (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h830 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h812 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h876 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h991 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h946 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h1003 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h940 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h1008 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h995 #define REG_CKG_S2_ODCLK (REG_CLKGEN2_BASE + 0xC6 ) macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo.c1264 MDrv_WriteByteMask(REG_CKG_S2_ODCLK, 0x04, CKG_S2_ODCLK_MASK); in _MApi_XC_Init_WithoutCreateMutex()
1268 MDrv_WriteByteMask(REG_CKG_S2_ODCLK, 0x0C, CKG_S2_ODCLK_MASK); in _MApi_XC_Init_WithoutCreateMutex()
H A Dmvideo.c.01261 MDrv_WriteByteMask(REG_CKG_S2_ODCLK, 0x04, CKG_S2_ODCLK_MASK);
1265 MDrv_WriteByteMask(REG_CKG_S2_ODCLK, 0x0C, CKG_S2_ODCLK_MASK);