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Searched refs:REG_CKG_S2_IDCLK2 (Results 1 – 25 of 37) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c625 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
627 MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, DISABLE, CKG_S2_IDCLK2_GATED); in Hal_SC2_mux_set_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c245 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
257 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
264 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_pip.c540 …MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, !bEnable, CKG_S2_IDCLK2_GATED); // REG_CLKGEN2_65[0], s2_idclk2 in Hal_SC_EnableCLK_for_SUB()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c625 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
627 MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, DISABLE, CKG_S2_IDCLK2_GATED); in Hal_SC2_mux_set_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c245 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
257 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
264 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_pip.c540 …MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, !bEnable, CKG_S2_IDCLK2_GATED); // REG_CLKGEN2_65[0], s2_idclk2 in Hal_SC_EnableCLK_for_SUB()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c625 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
627 MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, DISABLE, CKG_S2_IDCLK2_GATED); in Hal_SC2_mux_set_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c245 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
257 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
264 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_pip.c515 …MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, !bEnable, CKG_S2_IDCLK2_GATED); // REG_CLKGEN2_65[0], s2_idclk2 in Hal_SC_EnableCLK_for_SUB()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c625 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
627 MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, DISABLE, CKG_S2_IDCLK2_GATED); in Hal_SC2_mux_set_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c245 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
256 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
257 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
263 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
264 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_pip.c515 …MDrv_WriteRegBit(REG_CKG_S2_IDCLK2, !bEnable, CKG_S2_IDCLK2_GATED); // REG_CLKGEN2_65[0], s2_idclk2 in Hal_SC_EnableCLK_for_SUB()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c292 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
303 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
304 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
310 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
311 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_mux.c627 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c249 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
260 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
261 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
267 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
268 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_mux.c625 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
635 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_ip.c248 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
259 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
260 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
266 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
267 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_mux.c578 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
588 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_ip.c249 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
260 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
261 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
267 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
268 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_mux.c548 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
558 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_ip.c248 MS_U8 u8CLK2Mux = MDrv_ReadByte(REG_CKG_S2_IDCLK2); //Main window in Hal_SC_ip_software_reset()
259 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
260 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
266 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_XTAL, CKG_S2_IDCLK2_MASK); // Main window rese… in Hal_SC_ip_software_reset()
267 …MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8CLK2Mux, CKG_S2_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
H A Dmhal_mux.c497 MDrv_WriteByteMask(REG_CKG_S2_IDCLK2, u8Clk_Mux << 2, CKG_S2_IDCLK2_MASK); in Hal_SC2_mux_set_mainwin_ip_mux()
507 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h875 #define REG_CKG_S2_IDCLK2 (REG_CLKGEN2_BASE + 0xCA ) // off-line detect idclk macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h857 #define REG_CKG_S2_IDCLK2 (REG_CLKGEN2_BASE + 0xCA ) // off-line detect idclk macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h921 #define REG_CKG_S2_IDCLK2 (REG_CLKGEN2_BASE + 0xCA ) // off-line detect idclk macro

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