| /utopia/UTPA2-700.0.x/modules/mfe/hal/maldives/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880 macro 158 #define __MFE_REG1(reg) (*(volatile MFE_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80 //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/mustang/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880 macro 158 #define __MFE_REG1(reg) (*(volatile MFE_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80 //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/maxim/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/M7621/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/M7821/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/mainz/mfe_ex/ |
| H A D | mhal_mfe.h | 153 #define REG_BANK_MFE1 0x8880UL macro 154 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 158 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/macan/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/manhattan/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/k6/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 169 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/messi/mfe_ex/ |
| H A D | mhal_mfe.h | 153 #define REG_BANK_MFE1 0x8880UL macro 154 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 158 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/maserati/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 162 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/kano/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 169 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/hal/curry/mfe_ex/ |
| H A D | mhal_mfe.h | 157 #define REG_BANK_MFE1 0x8880UL macro 158 #define __MFE_REG1(reg) (*(volatile MS_U16 *) ( T8_RIU_BASE + (REG_BANK_MFE1 + reg) * 4 ) ) 169 #define REG_BANK_MFE1 0x0b80UL //Local FPGA macro
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| /utopia/UTPA2-700.0.x/modules/mfe/drv/mfe_ex/cModel/ |
| H A D | mfe_common.c | 128 UDMA_RIUWrite16(REG_BANK_MFE1+u32Address, val); in WriteRegMFE_BANK1() 153 UDMA_RIURead16(REG_BANK_MFE1+u32Address, val); in ReadRegMFE_BANK1()
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