| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | mhal_adctbl.c | 138 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
156 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | mhal_adctbl.c | 138 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
156 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | mhal_adctbl.c | 138 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
156 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | mhal_adctbl.c | 138 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
156 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | mhal_adctbl.c | 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, },
173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, },
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| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_adc_dtop.h | 109 #define REG_ADC_DTOP_01_H (REG_ADC_DTOP_BASE + 0x03) macro
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