| /utopia/UTPA2-700.0.x/modules/ve/hal/macan/ve/ |
| H A D | mhal_tvencoder.c | 323 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
326 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
400 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
401 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
403 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
404 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
489 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
580 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
611 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
613 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/mainz/ve/ |
| H A D | mhal_tvencoder.c | 321 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
324 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
398 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
399 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
401 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
402 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
487 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
578 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
609 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
611 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/messi/ve/ |
| H A D | mhal_tvencoder.c | 321 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
324 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
398 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
399 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
401 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
402 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
487 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
578 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
609 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
611 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/maxim/ve/ |
| H A D | mhal_tvencoder.c | 331 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
334 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
408 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
409 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
411 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
412 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
497 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
588 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
619 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
621 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/manhattan/ve/ |
| H A D | mhal_tvencoder.c | 327 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
330 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
404 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
405 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
407 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
408 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
493 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
584 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
615 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
617 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/maserati/ve/ |
| H A D | mhal_tvencoder.c | 330 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
333 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
407 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
408 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
410 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
411 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
496 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
587 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
618 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
620 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/M7621/ve/ |
| H A D | mhal_tvencoder.c | 331 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
334 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
408 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
409 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
411 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
412 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
497 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
588 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
619 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
621 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/M7821/ve/ |
| H A D | mhal_tvencoder.c | 330 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
333 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
407 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
408 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
410 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
411 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
496 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
587 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
618 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
620 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/mustang/ve/ |
| H A D | mhal_tvencoder.c | 318 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
321 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
398 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
399 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
401 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
402 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
488 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
579 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
610 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
612 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/maldives/ve/ |
| H A D | mhal_tvencoder.c | 318 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
321 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
395 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
396 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
398 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 1, BIT(5)); // load register in Hal_VE_set_output_video_std()
399 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), 0, BIT(5)); in Hal_VE_set_output_video_std()
485 MDrv_WriteRegBit(L_BK_VE_SRC(0x38), ben, BIT(6)); in Hal_VE_set_fix_color_out()
576 MDrv_WriteRegBit(L_BK_VE_SRC(0x41), bEn, BIT(0)); in Hal_VE_set_hsync_inverse()
607 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 0, BIT(0)); // enable Full drop in Hal_VE_set_frc()
609 MDrv_WriteRegBit(L_BK_VE_SRC(0x20), 1, BIT(0)); // disable Full drop in Hal_VE_set_frc()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/k6/ve/ |
| H A D | mhal_tvencoder.c | 727 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
730 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
741 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(3), BIT(3)); in Hal_VE_init()
743 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(2), BIT(2)); in Hal_VE_init()
951 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
952 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
960 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), TRUE, BIT(5)); // load register in Hal_VE_set_output_video_std()
961 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), FALSE, BIT(5)); in Hal_VE_set_output_video_std()
981 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), FALSE, BIT(0)); in Hal_VE_set_output_video_std()
984 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), TRUE, BIT(0)); in Hal_VE_set_output_video_std()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/kano/ve/ |
| H A D | mhal_tvencoder.c | 717 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
720 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
731 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(3), BIT(3)); in Hal_VE_init()
733 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(2), BIT(2)); in Hal_VE_init()
932 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
933 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
941 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), TRUE, BIT(5)); // load register in Hal_VE_set_output_video_std()
942 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), FALSE, BIT(5)); in Hal_VE_set_output_video_std()
962 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), FALSE, BIT(0)); in Hal_VE_set_output_video_std()
965 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), TRUE, BIT(0)); in Hal_VE_set_output_video_std()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/curry/ve/ |
| H A D | mhal_tvencoder.c | 717 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
720 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
731 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(3), BIT(3)); in Hal_VE_init()
733 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(2), BIT(2)); in Hal_VE_init()
935 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
936 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
944 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), TRUE, BIT(5)); // load register in Hal_VE_set_output_video_std()
945 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), FALSE, BIT(5)); in Hal_VE_set_output_video_std()
965 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), FALSE, BIT(0)); in Hal_VE_set_output_video_std()
968 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), TRUE, BIT(0)); in Hal_VE_set_output_video_std()
[all …]
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| /utopia/UTPA2-700.0.x/modules/ve/hal/k6lite/ve/ |
| H A D | mhal_tvencoder.c | 724 MDrv_WriteRegBit(H_BK_VE_SRC(0x7E), 1, BIT(0)); //enable black boundary in Hal_VE_init()
727 MDrv_WriteRegBit(L_BK_VE_SRC(0x5A), DISABLE, BIT(0));// disable scaler in in Hal_VE_init()
738 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(3), BIT(3)); in Hal_VE_init()
740 MDrv_WriteRegBit(L_BK_VE_SRC(0x5C), BIT(2), BIT(2)); in Hal_VE_init()
938 MDrv_WriteRegBit(L_BK_VE_ENC(0x03), pVideoSysTbl->bvtotal_525, BIT(3)); // vtotal in Hal_VE_set_output_video_std()
939 MDrv_WriteRegBit(L_BK_VE_ENC(0x06), pVideoSysTbl->bPALSwitch, BIT(0)); // Palswitch in Hal_VE_set_output_video_std()
947 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), TRUE, BIT(5)); // load register in Hal_VE_set_output_video_std()
948 MDrv_WriteRegBit(L_BK_VE_SRC(0x00), FALSE, BIT(5)); in Hal_VE_set_output_video_std()
968 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), FALSE, BIT(0)); in Hal_VE_set_output_video_std()
971 MDrv_WriteRegBit(L_BK_VE_ENC_EX(0x10), TRUE, BIT(0)); in Hal_VE_set_output_video_std()
[all …]
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/ |
| H A D | mdrv_sc_pip.c | 723 … MDrv_WriteRegBit(REG_CKG_FICLK_F1, DISABLE, CKG_FICLK_F1_INVERT); // Not Invert in MDrv_XC_EnableCLK_for_SUB()
724 … MDrv_WriteRegBit(REG_CKG_FICLK_F1, DISABLE, CKG_FICLK_F1_GATED); // Enable clock in MDrv_XC_EnableCLK_for_SUB()
727 … MDrv_WriteRegBit(REG_CKG_IDCLK1, DISABLE, CKG_IDCLK1_INVERT); // Not Invert in MDrv_XC_EnableCLK_for_SUB()
728 … MDrv_WriteRegBit(REG_CKG_IDCLK1, DISABLE, CKG_IDCLK1_GATED); // Enable clock in MDrv_XC_EnableCLK_for_SUB()
732 MDrv_WriteRegBit(REG_CKG_SIDCLK1, DISABLE, CKG_SIDCLK1_INVERT); in MDrv_XC_EnableCLK_for_SUB()
733 MDrv_WriteRegBit(REG_CKG_SIDCLK1, DISABLE, CKG_SIDCLK1_GATED); in MDrv_XC_EnableCLK_for_SUB()
739 MDrv_WriteRegBit(REG_CKG_FICLK_F1, ENABLE, CKG_FICLK_F1_INVERT); // Not Invert in MDrv_XC_EnableCLK_for_SUB()
740 … MDrv_WriteRegBit(REG_CKG_FICLK_F1, ENABLE, CKG_FICLK_F1_GATED); // Enable clock in MDrv_XC_EnableCLK_for_SUB()
743 MDrv_WriteRegBit(REG_CKG_IDCLK1, ENABLE, CKG_IDCLK1_INVERT); // Not Invert in MDrv_XC_EnableCLK_for_SUB()
744 … MDrv_WriteRegBit(REG_CKG_IDCLK1, ENABLE, CKG_IDCLK1_GATED); // Enable clock in MDrv_XC_EnableCLK_for_SUB()
[all …]
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| /utopia/UTPA2-700.0.x/modules/usb/hal/mustang/usbhost/ |
| H A D | halUSB.c | 57 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
58 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
59 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
61 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
70 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
71 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
72 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/maldives/usbhost/ |
| H A D | halUSB.c | 57 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
58 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
59 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
61 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
70 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
71 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
72 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/messi/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/M7621/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/maxim/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/manhattan/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/M7821/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/maserati/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/macan/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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| /utopia/UTPA2-700.0.x/modules/usb/hal/mainz/usbhost/ |
| H A D | halUSB.c | 62 MDrv_WriteRegBit(utmi_base+0x01, ENABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
63 MDrv_WriteRegBit(bc_base+0x03, ENABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
64 MDrv_WriteRegBit(bc_base+0x0C, ENABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
66 MDrv_WriteRegBit(bc_base+0x0A, ENABLE, 0x80); // [7]=reg_bc_switch_en in HAL_USB_BC_Enable()
75 MDrv_WriteRegBit(bc_base+0x0C, DISABLE, 0x40); // [6]= reg_into_host_bc_sw_tri in HAL_USB_BC_Enable()
76 MDrv_WriteRegBit(bc_base+0x03, DISABLE, 0x40); // [6]= reg_host_bc_en in HAL_USB_BC_Enable()
77 MDrv_WriteRegBit(utmi_base+0x01, DISABLE, 0x40); //IREF_PDN=1��b1. (utmi+0x01[6] ) in HAL_USB_BC_Enable()
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