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Searched refs:M2S_MBOX_SW_DMA_READER_DDR_Ctrl (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A DhalSOUND.c260 … HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x8000); // bit 15 in HAL_SOUND_SetMute()
264 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x0000); in HAL_SOUND_SetMute()
H A Daudio_comm2.h721 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/
H A DhalSOUND.c257 … HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x8000); // bit 15 in HAL_SOUND_SetMute()
261 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x0000); in HAL_SOUND_SetMute()
H A Daudio_comm2.h529 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A DhalSOUND.c260 … HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x8000); // bit 15 in HAL_SOUND_SetMute()
264 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x0000); in HAL_SOUND_SetMute()
H A Daudio_comm2.h755 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A DhalSOUND.c259 … HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x8000); // bit 15 in HAL_SOUND_SetMute()
263 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x0000); in HAL_SOUND_SetMute()
H A Daudio_comm2.h730 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A DhalSOUND.c260 … HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x8000); // bit 15 in HAL_SOUND_SetMute()
264 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x8000, 0x0000); in HAL_SOUND_SetMute()
H A Daudio_comm2.h727 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/manhattan/audio/
H A DhalAUDIO.c10038 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0001); in HAL_AUDIO_Pcm_SwDma_Reader1_Restart()
10182 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0002); in HAL_AUDIO_Pcm_SwDma_Reader1_Start()
10200 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0000); in HAL_AUDIO_Pcm_SwDma_Reader1_Stop()
10589 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0008); in HAL_AUDIO_Pcm_SwDma_Reader1_Get()
10591 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0000); in HAL_AUDIO_Pcm_SwDma_Reader1_Get()
H A Daudio_comm2.h613 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/
H A Daudio_comm2.h649 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
H A DhalAUDIO.c10335 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0001); in HAL_AUDIO_PCM_SwDma_Reader1_Restart()
10492 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0002); in HAL_AUDIO_PCM_SwDma_Reader1_Start()
10510 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Stop()
10909 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0008); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
10911 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
/utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/
H A Daudio_comm2.h649 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/mainz/audio/
H A DhalAUDIO.c9202 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0001); in HAL_AUDIO_PCM_SwDma_Reader1_Restart()
9359 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0002); in HAL_AUDIO_PCM_SwDma_Reader1_Start()
9377 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Stop()
9776 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0008); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
9778 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
H A Daudio_comm2.h954 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/messi/audio/
H A DhalAUDIO.c9186 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0001); in HAL_AUDIO_PCM_SwDma_Reader1_Restart()
9343 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0002); in HAL_AUDIO_PCM_SwDma_Reader1_Start()
9361 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Stop()
9760 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0008); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
9762 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
H A Daudio_comm2.h951 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A Daudio_comm2.h540 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A Daudio_comm2.h564 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A Daudio_comm2.h704 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
H A DhalAUDIO.c11314 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0001); in HAL_AUDIO_PCM_SwDma_Reader1_Restart()
11470 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0002); in HAL_AUDIO_PCM_SwDma_Reader1_Start()
11488 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0xFFFF, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Stop()
11887 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0008); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
11889 HAL_AUDIO_WriteMaskReg(M2S_MBOX_SW_DMA_READER_DDR_Ctrl, 0x0008, 0x0000); in HAL_AUDIO_PCM_SwDma_Reader1_Get()
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/
H A Daudio_comm2.h574 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A Daudio_comm2.h737 #define M2S_MBOX_SW_DMA_READER_DDR_Ctrl MB_2D36 macro

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