Home
last modified time | relevance | path

Searched refs:HAL_AUR2_WriteReg (Results 1 – 25 of 47) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A DhalMAD2.c322 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
323 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
324 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
325 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
327 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
328 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
329 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
330 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
332 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
333 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A DhalMAD2.c310 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
311 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
312 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
313 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
315 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
316 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
317 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
318 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
320 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
321 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c240 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
427 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
428 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
429 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
430 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
455 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
456 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
457 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
458 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
507 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A DhalMAD2.c322 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
323 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
324 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
325 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
327 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
328 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
329 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
330 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
332 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
333 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c216 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
445 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
446 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
447 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
448 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
473 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
474 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
475 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
476 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
525 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A DhalMAD2.c310 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
311 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
312 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
313 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
315 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
316 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
317 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
318 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
320 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
321 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c240 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
427 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
428 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
429 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
430 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
455 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
456 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
457 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
458 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
507 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A DhalMAD2.c318 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
319 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
320 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
321 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
323 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
324 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
325 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
326 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
328 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
329 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c263 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
454 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
455 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
456 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
457 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
482 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
483 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
484 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
485 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
534 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/manhattan/audio/
H A DhalMAD2.c317 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
318 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
319 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
320 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
322 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
323 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
324 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
325 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
327 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
328 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c236 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
421 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
422 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
423 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
424 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
449 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
450 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
451 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
452 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
501 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A DhalMAD2.c317 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
318 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
319 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
320 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
322 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
323 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
324 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
325 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
327 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
328 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c233 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
407 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
408 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
409 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
410 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
435 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
436 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
437 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
438 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
487 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A DhalMAD2.c293 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
294 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
295 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
296 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
298 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
299 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
300 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
301 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
303 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
304 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/
H A DhalMAD2.c293 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
294 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
295 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
296 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
298 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
299 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
300 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
301 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
303 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
304 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A DhalMAD2.c293 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
294 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
295 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
296 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
298 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
299 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
300 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
301 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
303 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
304 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/
H A DhalMAD2.c297 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
298 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
299 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
300 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
302 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x8000); in HAL_MAD2_SetMemInfo()
303 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
304 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x8000); in HAL_MAD2_SetMemInfo()
305 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
307 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
308 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c261 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
450 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
451 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
452 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
453 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
497 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
498 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
499 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
500 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
553 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audsp/
H A DhalAUDSP.c391 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
392 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
393 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
394 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
404 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
405 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
406 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
407 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
408 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_LO, (MS_U16)(SND_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
409 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_HI, (MS_U16)((SND_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/
H A DhalMAD2.c288 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
289 HAL_AUR2_WriteReg(REG_DECR2_ICMEM2_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
290 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
291 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
293 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x0000); in HAL_MAD2_SetMemInfo()
294 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
295 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x0000); in HAL_MAD2_SetMemInfo()
296 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
298 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
299 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audsp/
H A DhalAUDSP.c537 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
538 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
539 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
540 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
550 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
551 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
552 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
553 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
554 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_LO, (MS_U16)(SND_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
555 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_HI, (MS_U16)((SND_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audsp/
H A DhalAUDSP.c537 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
538 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
539 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
540 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
550 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
551 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
552 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
553 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
554 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_LO, (MS_U16)(SND_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
555 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_HI, (MS_U16)((SND_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audsp/
H A DhalAUDSP.c536 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
537 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
538 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
539 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
549 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
550 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
551 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
552 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
553 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_LO, (MS_U16)(SND_R2_ADDR & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
554 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_HI, (MS_U16)((SND_R2_ADDR >> 16) & 0xFFFF)); in HAL_AUDSP_DspLoadCode()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/
H A DhalMAD2.c289 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
290 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
291 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF)); in HAL_MAD2_SetMemInfo()
292 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF)); in HAL_MAD2_SetMemInfo()
294 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_LO, 0x8000); in HAL_MAD2_SetMemInfo()
295 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_BASE_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
296 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_LO, 0x8000); in HAL_MAD2_SetMemInfo()
297 HAL_AUR2_WriteReg(REG_DECR2_DQMEM_SIZE_MASK_HI, 0xFFFF); in HAL_MAD2_SetMemInfo()
299 HAL_AUR2_WriteReg(REG_DECR2_IO1_MAPPING_BASE_HI, 0x9000); in HAL_MAD2_SetMemInfo()
300 HAL_AUR2_WriteReg(REG_DECR2_IO2_MAPPING_BASE_HI, 0xB000); in HAL_MAD2_SetMemInfo()
[all …]
H A DhalAUR2.c258 void HAL_AUR2_WriteReg(MS_U32 u32RegAddr, MS_U16 u16Val) in HAL_AUR2_WriteReg() function
447 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_SetCommInfo()
448 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL2, param2 ); in HAL_SND_R2_SetCommInfo()
449 HAL_AUR2_WriteReg( REG_R2_0_ID_SELECT, tmpVal ); in HAL_SND_R2_SetCommInfo()
450 HAL_AUR2_WriteReg( REG_R2_0_PARAM_TYPE, infoType ); in HAL_SND_R2_SetCommInfo()
494 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL1, param1 ); in HAL_DEC_R2_SetCommInfo()
495 HAL_AUR2_WriteReg( REG_R2_1_PARAM_VAL2, param2 ); in HAL_DEC_R2_SetCommInfo()
496 HAL_AUR2_WriteReg( REG_R2_1_ID_SELECT, tmpVal ); in HAL_DEC_R2_SetCommInfo()
497 HAL_AUR2_WriteReg( REG_R2_1_PARAM_TYPE, infoType ); in HAL_DEC_R2_SetCommInfo()
550 HAL_AUR2_WriteReg( REG_R2_0_PARAM_VAL1, param1 ); in HAL_SND_R2_GetCommInfo()
[all …]

12