1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
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11 //
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20 //
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
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91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 //-------------------------------------------------------------------------------------------------
96 // Include Files
97 //-------------------------------------------------------------------------------------------------
98 // Common Definition
99 #ifdef MSOS_TYPE_LINUX_KERNEL
100 #include <linux/string.h>
101 #else
102 #include <string.h>
103 #endif
104
105 #include "MsCommon.h"
106 #include "MsIRQ.h"
107 #include "MsOS.h"
108 #include "MsTypes.h"
109
110 #include "drvBDMA.h"
111 #include "drvSERFLASH.h"
112
113 #include "regCHIP.h"
114
115 #include "halAUDSP.h"
116 #include "drvAUDIO.h"
117 #include "regAUDIO.h"
118 #include "halAUDIO.h"
119 #include "halMAD2.h"
120 #include "halSIF.h"
121 #include "halADVAUDIO.h"
122 #include "ddr_config.h"
123 #include "r2_shm_comm.h"
124 #include "decR2_shm.h"
125 #if ASND_R2_SUPPORT
126 #include "sndR2_shm.h"
127 #endif
128
129 #ifdef CONFIG_MBOOT//Mboot Mini system
130 #include "dspcode_s/aucode_mboot_r2.c"
131 #else
132 #include "dspcode_s/aucode_adec_r2.c"
133 #if ASND_R2_SUPPORT
134 #include "dspcode_s/aucode_asnd_r2.c"
135 #endif
136 #endif
137
138
139
140 #if defined(MSOS_TYPE_NUTTX)
141 extern int lib_lowprintf(const char *format, ...);
142 #define DBG_PREFIX lib_lowprintf
143 #else
144 #define DBG_PREFIX printf
145 #endif
146
147 #if (defined ANDROID)
148 #include <sys/mman.h>
149 #include <cutils/ashmem.h>
150 #include <cutils/log.h>
151
152 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
153 #define LOGI ALOGI
154 #endif
155
156 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
157 #define LOGE ALOGE
158 #endif
159
160 #define HALAUDSP_PRINT(fmt, args...) LOGI("<<android>> " fmt, ## args)
161 #define HALAUDSP_ERROR(fmt, args...) LOGE("<<android>> " fmt, ## args)
162 #else
163 #define HALAUDSP_PRINT(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
164 #define HALAUDSP_ERROR(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
165 #endif
166
167 #define HALAUDSP_CHECK_SHM_INIT \
168 do { \
169 if (g_AudioVars2 == NULL) \
170 { \
171 HALAUDSP_ERROR("%s() : Warning! g_AudioVars2 should not be NULL !!!\n", __FUNCTION__); \
172 HALAUDSP_ERROR("%s() : Perform SHM Init here !!!\n", __FUNCTION__); \
173 if (HAL_AUDIO_InitialVars() == FALSE) \
174 { \
175 MS_ASSERT(0); \
176 } \
177 } \
178 } while(0)
179
180 //-------------------------------------------------------------------------------------------------
181 // Driver Compiler Options
182 //-------------------------------------------------------------------------------------------------
183
184 #define DBG_AUDSP_LOAD(args...) //DBG_PREFIX(args)
185 #define DBG_AUDSP(args...) //DBG_PREFIX(args)
186 #define DBG_AUDSP_ERROR(args...) //DBG_PREFIX(args);
187
188 #ifdef CONFIG_MBOOT //mboot Speed up
189 #define DSP_VERIFY_DSP_CODE 0 // 0: don't verify dsp code (for speed)
190 // 1: verify dsp code (for debug)
191 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
192 // 1: check IDMA ready (for debug)
193 #else
194 #define DSP_VERIFY_DSP_CODE 1 // 0: don't verify dsp code (for speed)
195 // 1: verify dsp code (for debug)
196 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
197 // 1: check IDMA ready (for debug)
198 #endif
199
200 #define AU_NULL 0
201
202 #ifdef CONFIG_MBOOT
203 #define FLASH_COPY(x,y,z,i,j) TRUE
204 #define FLASH_CHKDONE() TRUE
205 #else
206 #define FLASH_COPY(x,y,z,i,j) MDrv_SERFLASH_CopyHnd(x,y,z,i,j)
207 #define FLASH_CHKDONE() MDrv_FLASH_CheckWriteDone()
208 #endif
209
210 LOAD_CODE_INFO g_loadcodeinfo;
211 MS_BOOL g_bDSPLoadCode = FALSE;
212
213 #ifndef CONFIG_MBOOT
214 AUDIO_ALG_INFO dsp_info[]=
215 {
216 // ---------- Decoder2 DSP Code ----------
217 //AU_DVB_SYS_NONE[0]
218 {
219 AU_NULL, AU_NULL, AU_NULL,
220 AU_NULL, AU_NULL, AU_NULL,
221 AU_NULL, AU_NULL, AU_NULL,
222 AU_NULL, AU_NULL, AU_NULL,
223 "DVB2_NONE",
224 AU_DVB2_NONE,
225 },
226 // SE System
227 {
228 AU_NULL, AU_NULL, AU_NULL,
229 AU_NULL, AU_NULL, AU_NULL,
230 AU_NULL, AU_NULL, AU_NULL,
231 AU_NULL, AU_NULL, AU_NULL,
232 "SE SYSTEM",
233 AU_SE_SYSTEM,
234 },
235 //DDE
236 {
237 AU_NULL, AU_NULL, AU_NULL,
238 AU_NULL, AU_NULL, AU_NULL,
239 AU_NULL, AU_NULL, AU_NULL,
240 AU_NULL, AU_NULL, AU_NULL,
241 "dde",
242 AU_DVB2_STANDARD_DDE,
243 },
244 //BTSC
245 {
246 AU_NULL, AU_NULL, AU_NULL,
247 AU_NULL, AU_NULL, AU_NULL,
248 AU_NULL, AU_NULL, AU_NULL,
249 AU_NULL, AU_NULL, AU_NULL,
250 "SIF BTSC",
251 AU_SIF_BTSC,
252 },
253 // PALSUM
254 {
255 AU_NULL, AU_NULL, AU_NULL,
256 AU_NULL, AU_NULL, AU_NULL,
257 AU_NULL, AU_NULL, AU_NULL,
258 AU_NULL, AU_NULL, AU_NULL,
259 "SIF PALSUM",
260 AU_SIF_PALSUM,
261 },
262 // audio_adv_sndeff_info
263 //DBX
264 {
265 AU_NULL, AU_NULL, AU_NULL,
266 AU_NULL, AU_NULL, AU_NULL,
267 AU_NULL, AU_NULL, AU_NULL,
268 AU_NULL, AU_NULL, AU_NULL,
269 "ADVSND DBX",
270 AU_DVB2_ADVSND_DBX,
271 },
272 //PURESND
273 {
274 AU_NULL, AU_NULL, AU_NULL,
275 AU_NULL, AU_NULL, AU_NULL,
276 AU_NULL, AU_NULL, AU_NULL,
277 AU_NULL, AU_NULL, AU_NULL,
278 "ADVSND PURESND",
279 AU_DVB2_ADVSND_PURESND,
280 },
281 //DPS
282 {
283 AU_NULL, AU_NULL, AU_NULL,
284 AU_NULL, AU_NULL, AU_NULL,
285 AU_NULL, AU_NULL, AU_NULL,
286 AU_NULL, AU_NULL, AU_NULL,
287 "ADVSND BONGIOVI_DPS",
288 AU_DVB2_ADVSND_BONGIOVI_DPS,
289 },
290 //DTSE
291 {
292 AU_NULL, AU_NULL, AU_NULL,
293 AU_NULL, AU_NULL, AU_NULL,
294 AU_NULL, AU_NULL, AU_NULL,
295 AU_NULL, AU_NULL, AU_NULL,
296 "DTSE",
297 AU_DVB2_ENCODE_DTSE,
298 },
299 //DDE
300 {
301 AU_NULL, AU_NULL, AU_NULL,
302 AU_NULL, AU_NULL, AU_NULL,
303 AU_NULL, AU_NULL, AU_NULL,
304 AU_NULL, AU_NULL, AU_NULL,
305 "DDE",
306 AU_DVB2_ENCODE_DDE,
307 },
308 //MS10-DDE
309 {
310 AU_NULL, AU_NULL, AU_NULL,
311 AU_NULL, AU_NULL, AU_NULL,
312 AU_NULL, AU_NULL, AU_NULL,
313 AU_NULL, AU_NULL, AU_NULL,
314 "MS10-DDE",
315 AU_DVB2_ENCODE_MS10_DDE,
316 },
317
318 };
319 #else //=======================CONFIG_MBOOT=========================================//
320 AUDIO_ALG_INFO dsp_info[]=
321 {
322 // ---------- Decoder2 DSP Code ----------
323 //AU_DVB_SYS_NONE[0]
324 {
325 AU_NULL, AU_NULL, AU_NULL,
326 AU_NULL, AU_NULL, AU_NULL,
327 AU_NULL, AU_NULL, AU_NULL,
328 AU_NULL, AU_NULL, AU_NULL,
329 "DVB2_NONE",
330 AU_DVB2_NONE,
331 },
332 // SE System
333 {
334 AU_NULL, AU_NULL, AU_NULL,
335 AU_NULL, AU_NULL, AU_NULL,
336 AU_NULL, AU_NULL, AU_NULL,
337 AU_NULL, AU_NULL, AU_NULL,
338 "SE SYSTEM",
339 AU_SE_SYSTEM,
340 },
341 };
342 #endif
343
344 #ifndef MSOS_TYPE_NOS
345 void* MDrv_MPool_PA2KSEG1(void* pAddrPhys);
346 #endif
347 //-------------------------------------------------------------------------------------------------
348 // Local Defines
349 //-------------------------------------------------------------------------------------------------
350 #define AUDIO_HAL_ERR(x, args...) //{printf(x, ##args);}
351 #define LOU8(MS_U16Val) ( (MS_U8)(MS_U16Val) )
352 #define HIU8(MS_U16Val) ( (MS_U8)((MS_U16Val) >> 8) )
353
354 //-------------------------------------------------------------------------------------------------
355 // Local Structures
356 //-------------------------------------------------------------------------------------------------
357
358
359 //-------------------------------------------------------------------------------------------------
360 // Global Variables
361 //-------------------------------------------------------------------------------------------------
362 extern MS_BOOL g_bAudio_loadcode_from_dram;
363 extern AUDIO_SHARED_VARS2 * g_AudioVars2;
364
365 extern MS_S32 _s32AUDIOMutexIDMA;
366
367 #ifndef MSOS_TYPE_NUTTX
368 extern AUDIO_TEE_INFO_SHARE_MEM *pAudioTeeInfoShm;
369 #endif
370
371
372 //-------------------------------------------------------------------------------------------------
373 // Local Variables
374 //-------------------------------------------------------------------------------------------------
375 static AUDIO_DSP_CODE_TYPE g_DspCodeTypeLoaded = AU_DVB_NONE;
376
377 //-------------------------------------------------------------------------------------------------
378 // Debug Functions
379 //-------------------------------------------------------------------------------------------------
380
381
382 //-------------------------------------------------------------------------------------------------
383 // Local Functions
384 //-------------------------------------------------------------------------------------------------
385
386
387 //-------------------------------------------------------------------------------------------------
388 // Global Functions
389 //-------------------------------------------------------------------------------------------------
390 ////////////////////////////////////////////////////////////////////////////////
391 /// @brief \b Function \b Name: MDrv_AUDIO_DspLoadCodeKernel()
392 /// @brief \b Function \b Description: load CM/PM/cache/prefetch DSP code
393 /// @param <IN> \b \b u8Type : -- DSP load code type
394 /// DSP_segment -- select DSP load code seg
395 /// DSP_select -- select DSP1 or DSP2
396 /// @param <OUT> \b NONE :
397 /// @param <RET> \b NONE :
398 /// @param <GLOBAL> \b NONE :
399 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)400 MS_BOOL HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)
401 {
402 #ifndef MSOS_TYPE_NUTTX
403 REE_TO_TEE_MBX_MSG_TYPE msg_type = REE_TO_TEE_MBX_MSG_NULL;
404 #endif
405 //MS_U8 DSP_select= DSP_SE;
406 //MS_U32 DEC_R2_ADDR, SND_R2_ADDR;
407 AUDIO_ALG_INFO *pau_info=NULL;
408 MS_U8 DSP_select=0;
409 MS_U32 MIU_addr;
410 int ii;
411
412 HALAUDSP_CHECK_SHM_INIT;
413
414 DBG_AUDSP_LOAD("@@@@@@@@@@ ====== HAL_AUDSP_DspLoadCode: 0x%x ======\r\n",u8Type);
415
416 if (IS_AUDIO_DSP_CODE_TYPE_DEC1_SYSTEM(dspCodeType))
417 {
418 return TRUE; // Decoder in DEC-R2
419 }
420 else if (IS_AUDIO_DSP_CODE_TYPE_DEC_SYSTEM(dspCodeType)) //AU_DEC_SYSTEM
421 {
422 return TRUE; // Decoder in DEC-R2
423 }
424 else if ((!IS_AUDIO_DSP_CODE_TYPE_DEC2_SYSTEM(dspCodeType)) ||
425 (!IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType)) ||
426 (!IS_AUDIO_DSP_CODE_TYPE_SIF(dspCodeType)) ||
427 (!IS_AUDIO_DSP_CODE_TYPE_ADVSND(dspCodeType)) ||
428 (!IS_AUDIO_DSP_CODE_TYPE_SE_ENC(dspCodeType)))
429 {
430 for (ii=0; ii< sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO);ii++)
431 {
432 if (dspCodeType == dsp_info[ii].dspCodeType)
433 break;
434 }
435 if (ii < (sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO)))
436 {
437 pau_info = &dsp_info[ii];
438 DSP_select = DSP_SE;
439 }
440 else
441 {
442 DBG_AUDSP_ERROR(AUDIO_DEBUG_LEVEL_ERROR, " [HAL_AUDSP_DspLoadCode]:====== Loading the wrong DSP code type!======\r\n");
443 return FALSE;
444 }
445 }
446
447 #ifndef MSOS_TYPE_NUTTX
448 AUDIO_TEE_INFO_SHM_CHECK_NULL;
449 REE_TO_TEE_MBX_MSG_SET_PARAM(0, (dspCodeType&0xFF));
450 REE_TO_TEE_MBX_MSG_SET_PARAM_COUNT(1);
451 msg_type = REE_TO_TEE_MBX_MSG_HAL_AUDSP_DspLoadCode;
452
453 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_SE;
454
455 if ( TEE_TO_REE_MBX_ACK_MSG_NO_TEE != (mbx_msg_ack_status = HAL_AUDIO_SendMBXMsg(msg_type)))
456 {
457 if (mbx_msg_ack_status != TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS)
458 return FALSE;
459 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
460 return TRUE;
461 }
462 #endif
463
464
465 // Load SE-DSP system code
466 if (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
467 {
468 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP DEC-R2
469 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); // clear DEC-R2 start cmd register
470 #if ASND_R2_SUPPORT
471 HAL_AUR2_WriteByte(REG_SNDR2_RESET_CTRL, 0x00); // STOP SND-R2
472 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register
473 #endif
474 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear SE-DSP start cmd register
475 AUDIO_DELAY1MS(1);
476
477 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3213); //use SDR2 address
478
479 #ifdef CONFIG_MBOOT
480 //============ Load R2 code ===============
481 // Memory sequence : Mboot-R2(DEC-R2)
482 //====================================
483 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
484
485 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
486 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
487 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
488 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
489 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
490 HAL_DEC_R2_init_SHM_param();
491 AUDIO_DELAY1MS(1);
492 MsOS_FlushMemory();
493
494 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
495 #else
496 //============ Load R2 code ===============
497 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
498 //====================================
499
500 // Load DEC-R2
501 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
502 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
503 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
504 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
505 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
506 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
507 HAL_DEC_R2_init_SHM_param();
508 AUDIO_DELAY1MS(1);
509 MsOS_FlushMemory();
510
511 #if ASND_R2_SUPPORT
512 // Load SND-R2
513 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV)+ADEC__R2_DDR_SIZE;
514 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_snd_r2)), SND_R2_SHM_DDR_OFFSET);
515 memset((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE), 0, ASND__R2_DDR_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
516 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
517 (void*)(mst_snd_r2+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
518 MST_SND_R2_AUDIO_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
519 HAL_SND_R2_init_SHM_param();
520 AUDIO_DELAY1MS(1);
521 MsOS_FlushMemory();
522
523 HAL_SND_R2_EnableR2(TRUE); // Enable SND-R2 after load R2 code
524 #endif
525 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
526 #endif
527
528 #if 0 //secure boot(Reserved)
529 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3210); //use SDR1 address
530
531 #ifdef CONFIG_MBOOT
532 //============ Load R2 code ===============
533 // Memory sequence : Mboot-R2(DEC-R2)
534 //====================================
535 DEC_R2_ADDR = (MS_U32) MsOS_MPool_VA2PA((MS_VIRT) &mst_codec_r2);
536
537 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF));
538 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF));
539 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF));
540 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF));
541 AUDIO_DELAY1MS(1);
542 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
543 #else
544 //============ Load R2 code ===============
545 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
546 //====================================
547 DEC_R2_ADDR = (MS_U32) MsOS_MPool_VA2PA((MS_VIRT) &mst_codec_r2);
548 SND_R2_ADDR = (MS_U32) MsOS_MPool_VA2PA((MS_VIRT) &mst_snd_r2);
549
550 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF));
551 HAL_AUR2_WriteReg(REG_DECR2_ICMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF));
552 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_LO, (MS_U16)(DEC_R2_ADDR & 0xFFFF));
553 HAL_AUR2_WriteReg(REG_DECR2_DCMEM_BASE_HI, (MS_U16)((DEC_R2_ADDR >> 16) & 0xFFFF));
554 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_LO, (MS_U16)(SND_R2_ADDR & 0xFFFF));
555 HAL_AUR2_WriteReg(REG_SNDR2_ICMEM_BASE_HI, (MS_U16)((SND_R2_ADDR >> 16) & 0xFFFF));
556 HAL_AUR2_WriteReg(REG_SNDR2_DCMEM_BASE_LO, (MS_U16)(SND_R2_ADDR & 0xFFFF));
557 HAL_AUR2_WriteReg(REG_SNDR2_DCMEM_BASE_HI, (MS_U16)((SND_R2_ADDR >> 16) & 0xFFFF));
558 AUDIO_DELAY1MS(1);
559 HAL_SND_R2_EnableR2(TRUE); // Enable SND-R2 after load R2 code
560 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
561 #endif
562 #endif
563 }
564
565 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
566 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadCode finished(type=(0x%x))\r\n" , u8dspCodeType);
567
568 return TRUE;
569 }
570
HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select,void * info)571 MS_BOOL HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select, void * info)
572 {
573 return TRUE;
574 }
575
HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select,AUDIO_ALG_INFO * pau_info)576 MS_BOOL HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select, AUDIO_ALG_INFO * pau_info)
577 {
578 return TRUE;
579 }
580
581 ////////////////////////////////////////////////////////////////////////////////
582 /// @brief \b Function \b Name: HAL_AUDIO_DspLoadCodeSegment()
583 /// @brief \b Function \b Description: This routine is used to load DSP code
584 /// @param <IN> \b dsp_addr :
585 /// @param <IN> \b dspCode_buf :
586 /// @param <IN> \b dspCode_buflen :
587 /// @param <OUT> \b NONE :
588 /// @param <RET> \b BOOL : TRUE --DSP Load code okay
589 /// FALSE--DSP Load code fail
590 /// @param <GLOBAL> \b NONE :
591 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)592 MS_BOOL HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
593 {
594 g_bDSPLoadCode = TRUE;
595 return TRUE; // secure boot: MCU can't use IDMA
596 }
597
HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)598 MS_BOOL HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
599 {
600 g_bDSPLoadCode = TRUE;
601 return TRUE; // secure boot: MCU can't use IDMA
602 }
603
604 ////////////////////////////////////////////////////////////////////////////////
605 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
606 /// @brief \b Function \b Description: This routine is used to check if the Dec-DSP IDMA is ready or not.
607 /// @param <IN> \b IdmaChk_type :
608 /// 0x10 : check write ready
609 /// 0x80 : check read ready
610 /// @param <OUT> \b NONE :
611 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
612 /// FALSE--IDMA not ready
613 /// @param <GLOBAL> \b NONE :
614 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type)615 MS_BOOL HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type )
616 {
617 return FALSE; // secure boot: MCU can't use IDMA
618 }
619
620 ////////////////////////////////////////////////////////////////////////////////
621 /// @brief \b Function \b Name: HAL_AUDIO_CheckSeIdmaReady()
622 /// @brief \b Function \b Description: This routine is used to check if the Se-DSP IDMA is ready or not.
623 /// @param <IN> \b IdmaChk_type :
624 /// 0x10 : check write ready
625 /// 0x80 : check read ready
626 /// @param <OUT> \b NONE :
627 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
628 /// FALSE--IDMA not ready
629 /// @param <GLOBAL> \b NONE :
630 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)631 MS_BOOL HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)
632 {
633 MS_U8 j = 0;
634
635 while(j<200)
636 {
637 j++;
638 if( (HAL_AUDIO_ReadByte(REG_SE_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
639 return TRUE;
640 }
641
642 DBG_AUDSP_ERROR("XBox check data trans fail!(%d)\r\n",j);
643 return FALSE;
644 }
645
646 ////////////////////////////////////////////////////////////////////////////////
647 /// @brief \b Function \b Name: HAL_AUDSP_SetDspCodeTypeLoaded()
648 /// @brief \b Function \b Description: This function is used to set the DSP code type.
649 /// @param <IN> \b NONE :
650 /// @param <OUT> \b NONE :
651 /// @param <RET> \b MS_U8: DSP code type.
652 /// @param <GLOBAL> \b NONE :
653 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_SetDspCodeTypeLoaded(AUDIO_DSP_CODE_TYPE dspCodeType)654 void HAL_AUDSP_SetDspCodeTypeLoaded(AUDIO_DSP_CODE_TYPE dspCodeType)
655 {
656 g_DspCodeTypeLoaded = dspCodeType;
657 }
658
659 ////////////////////////////////////////////////////////////////////////////////
660 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
661 /// @brief \b Function \b Description: This function is used to get the MAD base address.
662 /// @param <IN> \b NONE :
663 /// @param <OUT> \b NONE :
664 /// @param <RET> \b MS_U8: DSP code type.
665 /// @param <GLOBAL> \b NONE :
666 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspCodeTypeLoaded(void)667 AUDIO_DSP_CODE_TYPE HAL_AUDSP_GetDspCodeTypeLoaded(void)
668 {
669 return g_DspCodeTypeLoaded;
670 }
671
HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO * pau_info,MS_U8 DSP_select)672 void HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO *pau_info, MS_U8 DSP_select)
673 {
674 g_loadcodeinfo.pau_info = pau_info;
675 g_loadcodeinfo.DSP_select= DSP_select;
676 }
677
678 ////////////////////////////////////////////////////////////////////////////////
679 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
680 /// @brief \b Function \b Description: This function is used to get the MAD base address.
681 /// @param <IN> \b NONE :
682 /// @param <OUT> \b NONE :
683 /// @param <RET> \b MS_U8: DSP code type.
684 /// @param <GLOBAL> \b NONE :
685 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspLoadCodeInfo(void)686 LOAD_CODE_INFO* HAL_AUDSP_GetDspLoadCodeInfo(void)
687 {
688 return &g_loadcodeinfo;
689 }
690 ////////////////////////////////////////////////////////////////////////////////
691 /// @brief \b Function \b Name: HAL_AUDSP_DECR2LoadCode()
692 /// @brief \b Function \b Description: Load DEC-R2 code to DDR
693 /// @param <IN> \b NONE :
694 /// @param <OUT> \b NONE :
695 /// @param <RET> \b NONE :
696 /// @param <GLOBAL> \b NONE :
697 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DECR2LoadCode(void)698 void HAL_AUDSP_DECR2LoadCode(void)
699 {
700 MS_U32 MIU_addr;
701
702 printf("======audio: start DEC-R2 load code======\n");
703
704 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP DEC-R2
705 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register
706 AUDIO_DELAY1MS(1);
707
708 //============ Load R2 code ===============
709 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
710 //====================================
711
712 // Load DEC-R2
713 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
714
715 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
716 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
717 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
718 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
719 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
720 HAL_DEC_R2_init_SHM_param();
721 AUDIO_DELAY1MS(1);
722 MsOS_FlushMemory();
723
724 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
725 HAL_MAD2_SetMcuCmd(0xF3);
726
727 printf("======audio: end DEC-R2 load code======\n");
728 }
729
730 ////////////////////////////////////////////////////////////////////////////////
731 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
732 /// @brief \b Function \b Description: This routine is used to check if the XBox data transport is ready or not.
733 /// @param <OUT> \b NONE :
734 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
735 /// FALSE--IDMA not ready
736 /// @param <GLOBAL> \b NONE :
737 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_Check_XBox_TransData_Ready(void)738 MS_BOOL HAL_AUDSP_Check_XBox_TransData_Ready(void)
739 {
740 MS_U8 j = 0;
741 while(j<200)
742 {
743 j++;
744 if( (HAL_AUDIO_ReadByte(REG_DSP_XBOX_MISC)& 0x08) == 0x00 ) //bit[3] = 1 ,busy
745 return TRUE;
746 }
747 DBG_AUDSP_ERROR("XBox check data trans fail!(%d)\r\n",j);
748 return FALSE;
749 }
750