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Searched refs:HAL_AUR2_WriteMaskReg (Results 1 – 25 of 67) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/audio/hal/mainz/audio/
H A DhalAUDIO.c10014 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10017 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10018 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10019 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10020 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10021 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10048 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10051 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10052 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10063 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/messi/audio/
H A DhalAUDIO.c9998 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10001 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10002 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10003 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10004 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10005 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10032 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10035 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10036 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10047 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/
H A DhalAUDIO.c11147 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11150 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11151 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11152 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11153 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11154 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11181 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11184 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11185 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11196 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A DhalAUDIO.c6959 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0001, 0x0001); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
6966 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0002, 0x0002); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
11854 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11857 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11858 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11859 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11860 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11861 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11888 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11891 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c684 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
685 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/
H A DhalAUDIO.c6862 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0001, 0x0001); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
6869 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0002, 0x0002); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
11708 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11711 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11712 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11713 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11714 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11715 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11742 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11745 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c684 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
685 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/
H A DhalAUDIO.c6284 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0002, 0x0002); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
6291 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0001, 0x0001); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
11162 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11165 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11166 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11167 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11168 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11169 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11196 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11199 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c656 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
657 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A DhalAUDIO.c6333 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0002, 0x0002); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
6340 …HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0x0001, 0x0001); //use SDR2 address [1]:0x1630 [0];0… in HAL_AUDIO_SeSystemLoadCode()
11168 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11171 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11172 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11173 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11174 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11175 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11202 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11205 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c684 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
685 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A DhalAUDIO.c12129 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12132 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12133 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12134 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12135 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12136 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12163 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12166 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12167 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12178 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A DhalAUDIO.c11492 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11495 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11496 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11497 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11498 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11499 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11526 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11529 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11530 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11541 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c814 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
815 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A DhalAUDIO.c11665 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11668 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11669 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11670 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11671 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11672 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11699 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11702 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11703 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11714 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A DhalAUDIO.c12254 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12257 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12258 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12259 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12260 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8RIU control, bit0 … in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12261 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12288 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12291 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12292 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12303 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c802 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
803 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A DhalAUDIO.c6350 HAL_AUR2_WriteMaskReg(REG_SNDR2_ADVSND_SEL, 0xFF00, 0x1E00); // Switch R2 to KTV mode in HAL_AUDIO_SetEntertainmentMode()
12263 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12266 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12267 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12268 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12269 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8 RIU control, bit0… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12270 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12301 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12304 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12305 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/
H A DhalAUDIO.c11528 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11531 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11532 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11533 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11534 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8 RIU control, bit0… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11535 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11566 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11569 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11570 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11581 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
H A DhalMAD2.c792 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
793 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x00F3); in HAL_MAD2_SetMcuCmd()
/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A DhalAUDIO.c11814 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11817 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_L, 0xFFFF, u16Synthrate_L); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11818 HAL_AUR2_WriteMaskReg(R2_DMARDR1_REG_SYNTH_H, 0xFFFF, u16Synthrate_H); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11819 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11820 …HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0101); /* SYTH1 bit8 RIU control, bit0… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11821 HAL_AUR2_WriteMaskReg(R2_DMARDR_REG_SYNTH_UPDATE, 0x0101, 0x0100); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11852 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11855 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11856 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11867 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
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/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audsp/
H A DhalAUDSP.c469 … HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); // clear DEC-R2 start cmd register in HAL_AUDSP_DspLoadCode()
472 … HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register in HAL_AUDSP_DspLoadCode()
477 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3213); //use SDR2 address in HAL_AUDSP_DspLoadCode()
529 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3210); //use SDR1 address in HAL_AUDSP_DspLoadCode()
705 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register in HAL_AUDSP_DECR2LoadCode()
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audsp/
H A DhalAUDSP.c469 … HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); // clear DEC-R2 start cmd register in HAL_AUDSP_DspLoadCode()
472 … HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register in HAL_AUDSP_DspLoadCode()
477 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3213); //use SDR2 address in HAL_AUDSP_DspLoadCode()
529 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3210); //use SDR1 address in HAL_AUDSP_DspLoadCode()
705 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register in HAL_AUDSP_DECR2LoadCode()
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audsp/
H A DhalAUDSP.c469 … HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); // clear DEC-R2 start cmd register in HAL_AUDSP_DspLoadCode()
472 … HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register in HAL_AUDSP_DspLoadCode()
477 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3213); //use SDR2 address in HAL_AUDSP_DspLoadCode()
528 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3210); //use SDR1 address in HAL_AUDSP_DspLoadCode()
704 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register in HAL_AUDSP_DECR2LoadCode()
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audsp/
H A DhalAUDSP.c327 … HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); // clear DEC-R2 start cmd register in HAL_AUDSP_DspLoadCode()
331 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3213); //use SDR2 address in HAL_AUDSP_DspLoadCode()
383 HAL_AUR2_WriteMaskReg(REG_SDR_SWITCH_CTRL, 0xFFFF, 0x3210); //use SDR1 address in HAL_AUDSP_DspLoadCode()
572 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register in HAL_AUDSP_DECR2LoadCode()

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