| /utopia/UTPA2-700.0.x/modules/audio/hal/mainz/audio/ |
| H A D | audio_comm2.h | 271 #define DSP2_DM_SEG2_ADDR 0x2F00 macro 542 #define SRS_PURESOUND_mDummy_addr DSP2_DM_SEG2_ADDR 543 #define SRS_PURESOUND_SRS_EN_BITS_addr DSP2_DM_SEG2_ADDR+1 544 #define SRS_PURESOUND_mInputGain_addr DSP2_DM_SEG2_ADDR+2 545 #define SRS_PURESOUND_mOutputGain_addr DSP2_DM_SEG2_ADDR+3 546 #define SRS_PURESOUND_mBypassGain_addr DSP2_DM_SEG2_ADDR+4 547 #define SRS_PURESOUND_SpeakerSize_addr DSP2_DM_SEG2_ADDR+5 548 #define SRS_PURESOUND_TruBassControl_addr DSP2_DM_SEG2_ADDR+6 549 #define SRS_PURESOUND_SpeakerSize_Audio_addr DSP2_DM_SEG2_ADDR+7 550 #define SRS_PURESOUND_SpeakerSize_Analysis_addr DSP2_DM_SEG2_ADDR+8 [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/messi/audio/ |
| H A D | audio_comm2.h | 268 #define DSP2_DM_SEG2_ADDR 0x2F00 macro 539 #define SRS_PURESOUND_mDummy_addr DSP2_DM_SEG2_ADDR 540 #define SRS_PURESOUND_SRS_EN_BITS_addr DSP2_DM_SEG2_ADDR+1 541 #define SRS_PURESOUND_mInputGain_addr DSP2_DM_SEG2_ADDR+2 542 #define SRS_PURESOUND_mOutputGain_addr DSP2_DM_SEG2_ADDR+3 543 #define SRS_PURESOUND_mBypassGain_addr DSP2_DM_SEG2_ADDR+4 544 #define SRS_PURESOUND_SpeakerSize_addr DSP2_DM_SEG2_ADDR+5 545 #define SRS_PURESOUND_TruBassControl_addr DSP2_DM_SEG2_ADDR+6 546 #define SRS_PURESOUND_SpeakerSize_Audio_addr DSP2_DM_SEG2_ADDR+7 547 #define SRS_PURESOUND_SpeakerSize_Analysis_addr DSP2_DM_SEG2_ADDR+8 [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/ |
| H A D | audio_comm2.h | 183 #define DSP2_DM_SEG2_ADDR 0x2F00 macro 316 #define SRS_PURESOUND_mDummy_addr DSP2_DM_SEG2_ADDR 317 #define SRS_PURESOUND_SRS_EN_BITS_addr DSP2_DM_SEG2_ADDR+1 318 #define SRS_PURESOUND_mInputGain_addr DSP2_DM_SEG2_ADDR+2 319 #define SRS_PURESOUND_mOutputGain_addr DSP2_DM_SEG2_ADDR+3 320 #define SRS_PURESOUND_mBypassGain_addr DSP2_DM_SEG2_ADDR+4 321 #define SRS_PURESOUND_mHPFfc_addr DSP2_DM_SEG2_ADDR+5 322 #define SRS_PURESOUND_hlInputGain_addr DSP2_DM_SEG2_ADDR+25 323 #define SRS_PURESOUND_hlOutputGain_addr DSP2_DM_SEG2_ADDR+26 324 #define SRS_PURESOUND_hlBypassGain_addr DSP2_DM_SEG2_ADDR+27 [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/ |
| H A D | audio_comm2.h | 183 #define DSP2_DM_SEG2_ADDR 0x2F00 macro 316 #define SRS_PURESOUND_mDummy_addr DSP2_DM_SEG2_ADDR 317 #define SRS_PURESOUND_SRS_EN_BITS_addr DSP2_DM_SEG2_ADDR+1 318 #define SRS_PURESOUND_mInputGain_addr DSP2_DM_SEG2_ADDR+2 319 #define SRS_PURESOUND_mOutputGain_addr DSP2_DM_SEG2_ADDR+3 320 #define SRS_PURESOUND_mBypassGain_addr DSP2_DM_SEG2_ADDR+4 321 #define SRS_PURESOUND_mHPFfc_addr DSP2_DM_SEG2_ADDR+5 322 #define SRS_PURESOUND_hlInputGain_addr DSP2_DM_SEG2_ADDR+25 323 #define SRS_PURESOUND_hlOutputGain_addr DSP2_DM_SEG2_ADDR+26 324 #define SRS_PURESOUND_hlBypassGain_addr DSP2_DM_SEG2_ADDR+27 [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/ |
| H A D | audio_comm2.h | 204 #define DSP2_DM_SEG2_ADDR 0x3200 macro 245 #define ADV_SE_DM_SEG_ADDR DSP2_DM_SEG2_ADDR 410 #define SRS_PURESOUND_mDummy_addr (DSP2_DM_SEG2_ADDR ) 411 #define SRS_PURESOUND_SRS_EN_BITS_addr (DSP2_DM_SEG2_ADDR+1 ) 412 #define SRS_PURESOUND_mInputGain_addr (DSP2_DM_SEG2_ADDR+2 ) 413 #define SRS_PURESOUND_mOutputGain_addr (DSP2_DM_SEG2_ADDR+3 ) 414 #define SRS_PURESOUND_mBypassGain_addr (DSP2_DM_SEG2_ADDR+4 ) 415 #define SRS_PURESOUND_mHPFfc_addr (DSP2_DM_SEG2_ADDR+5 ) 416 #define SRS_PURESOUND_hlInputGain_addr (DSP2_DM_SEG2_ADDR+25) 417 #define SRS_PURESOUND_hlOutputGain_addr (DSP2_DM_SEG2_ADDR+26) [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/manhattan/audio/ |
| H A D | audio_comm2.h | 180 #define DSP2_DM_SEG2_ADDR 0x2B00 macro 318 #define SRS_PURESOUND_mDummy_addr DSP2_DM_SEG2_ADDR 319 #define SRS_PURESOUND_SRS_EN_BITS_addr DSP2_DM_SEG2_ADDR+1 320 #define SRS_PURESOUND_mInputGain_addr DSP2_DM_SEG2_ADDR+2 321 #define SRS_PURESOUND_mOutputGain_addr DSP2_DM_SEG2_ADDR+3 322 #define SRS_PURESOUND_mBypassGain_addr DSP2_DM_SEG2_ADDR+4 323 #define SRS_PURESOUND_mHPFfc_addr DSP2_DM_SEG2_ADDR+5 324 #define SRS_PURESOUND_hlInputGain_addr DSP2_DM_SEG2_ADDR+25 325 #define SRS_PURESOUND_hlOutputGain_addr DSP2_DM_SEG2_ADDR+26 326 #define SRS_PURESOUND_hlBypassGain_addr DSP2_DM_SEG2_ADDR+27 [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/ |
| H A D | audio_comm2.h | 210 #define DSP2_DM_SEG2_ADDR 0x3200 macro 251 #define ADV_SE_DM_SEG_ADDR DSP2_DM_SEG2_ADDR 416 #define SRS_PURESOUND_mDummy_addr (DSP2_DM_SEG2_ADDR ) 417 #define SRS_PURESOUND_SRS_EN_BITS_addr (DSP2_DM_SEG2_ADDR+1 ) 418 #define SRS_PURESOUND_mInputGain_addr (DSP2_DM_SEG2_ADDR+2 ) 419 #define SRS_PURESOUND_mOutputGain_addr (DSP2_DM_SEG2_ADDR+3 ) 420 #define SRS_PURESOUND_mBypassGain_addr (DSP2_DM_SEG2_ADDR+4 ) 421 #define SRS_PURESOUND_mHPFfc_addr (DSP2_DM_SEG2_ADDR+5 ) 422 #define SRS_PURESOUND_hlInputGain_addr (DSP2_DM_SEG2_ADDR+25) 423 #define SRS_PURESOUND_hlOutputGain_addr (DSP2_DM_SEG2_ADDR+26) [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/ |
| H A D | audio_comm2.h | 204 #define DSP2_DM_SEG2_ADDR 0x3200 macro 245 #define ADV_SE_DM_SEG_ADDR DSP2_DM_SEG2_ADDR 400 #define SRS_PURESOUND_mDummy_addr (DSP2_DM_SEG2_ADDR ) 401 #define SRS_PURESOUND_SRS_EN_BITS_addr (DSP2_DM_SEG2_ADDR+1 ) 402 #define SRS_PURESOUND_mInputGain_addr (DSP2_DM_SEG2_ADDR+2 ) 403 #define SRS_PURESOUND_mOutputGain_addr (DSP2_DM_SEG2_ADDR+3 ) 404 #define SRS_PURESOUND_mBypassGain_addr (DSP2_DM_SEG2_ADDR+4 ) 405 #define SRS_PURESOUND_mHPFfc_addr (DSP2_DM_SEG2_ADDR+5 ) 406 #define SRS_PURESOUND_hlInputGain_addr (DSP2_DM_SEG2_ADDR+25) 407 #define SRS_PURESOUND_hlOutputGain_addr (DSP2_DM_SEG2_ADDR+26) [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/ |
| H A D | audio_comm2.h | 210 #define DSP2_DM_SEG2_ADDR 0x3200 macro 251 #define ADV_SE_DM_SEG_ADDR DSP2_DM_SEG2_ADDR 409 #define SRS_PURESOUND_mDummy_addr (DSP2_DM_SEG2_ADDR ) 410 #define SRS_PURESOUND_SRS_EN_BITS_addr (DSP2_DM_SEG2_ADDR+1 ) 411 #define SRS_PURESOUND_mInputGain_addr (DSP2_DM_SEG2_ADDR+2 ) 412 #define SRS_PURESOUND_mOutputGain_addr (DSP2_DM_SEG2_ADDR+3 ) 413 #define SRS_PURESOUND_mBypassGain_addr (DSP2_DM_SEG2_ADDR+4 ) 414 #define SRS_PURESOUND_mHPFfc_addr (DSP2_DM_SEG2_ADDR+5 ) 415 #define SRS_PURESOUND_hlInputGain_addr (DSP2_DM_SEG2_ADDR+25) 416 #define SRS_PURESOUND_hlOutputGain_addr (DSP2_DM_SEG2_ADDR+26) [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/ |
| H A D | audio_comm2.h | 222 #define DSP2_DM_SEG2_ADDR 0x3200 macro 263 #define ADV_SE_DM_SEG_ADDR DSP2_DM_SEG2_ADDR 423 #define SRS_PURESOUND_mDummy_addr (DSP2_DM_SEG2_ADDR ) 424 #define SRS_PURESOUND_SRS_EN_BITS_addr (DSP2_DM_SEG2_ADDR+1 ) 425 #define SRS_PURESOUND_mInputGain_addr (DSP2_DM_SEG2_ADDR+2 ) 426 #define SRS_PURESOUND_mOutputGain_addr (DSP2_DM_SEG2_ADDR+3 ) 427 #define SRS_PURESOUND_mBypassGain_addr (DSP2_DM_SEG2_ADDR+4 ) 428 #define SRS_PURESOUND_mHPFfc_addr (DSP2_DM_SEG2_ADDR+5 ) 429 #define SRS_PURESOUND_hlInputGain_addr (DSP2_DM_SEG2_ADDR+25) 430 #define SRS_PURESOUND_hlOutputGain_addr (DSP2_DM_SEG2_ADDR+26) [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/ |
| H A D | audio_comm2.h | 210 #define DSP2_DM_SEG2_ADDR 0x3200 macro 251 #define ADV_SE_DM_SEG_ADDR DSP2_DM_SEG2_ADDR 406 #define SRS_PURESOUND_mDummy_addr (DSP2_DM_SEG2_ADDR ) 407 #define SRS_PURESOUND_SRS_EN_BITS_addr (DSP2_DM_SEG2_ADDR+1 ) 408 #define SRS_PURESOUND_mInputGain_addr (DSP2_DM_SEG2_ADDR+2 ) 409 #define SRS_PURESOUND_mOutputGain_addr (DSP2_DM_SEG2_ADDR+3 ) 410 #define SRS_PURESOUND_mBypassGain_addr (DSP2_DM_SEG2_ADDR+4 ) 411 #define SRS_PURESOUND_mHPFfc_addr (DSP2_DM_SEG2_ADDR+5 ) 412 #define SRS_PURESOUND_hlInputGain_addr (DSP2_DM_SEG2_ADDR+25) 413 #define SRS_PURESOUND_hlOutputGain_addr (DSP2_DM_SEG2_ADDR+26) [all …]
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| /utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/ |
| H A D | audio_comm2.h | 179 #define DSP2_DM_SEG2_ADDR 0x3300 macro
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| /utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/ |
| H A D | audio_comm2.h | 184 #define DSP2_DM_SEG2_ADDR 0x2F00 macro
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| /utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/ |
| H A D | audio_comm2.h | 196 #define DSP2_DM_SEG2_ADDR 0x2F00 macro
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| /utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/ |
| H A D | audio_comm2.h | 208 #define DSP2_DM_SEG2_ADDR 0x3300 macro
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