Searched refs:DSP2_DM_PREFETCH_DRAM_BASE (Results 1 – 15 of 15) sorted by relevance
725 #define DSP2_DM_PREFETCH_DRAM_BASE 0x00E000 macro729 …#define DSP2_DDE_PCM_DRAM_BASE DSP2_DM_PREFETCH_DRAM_BASE+0x400 // AC3 Encod…
767 #define DSP2_DM_PREFETCH_DRAM_BASE 0x00E500 macro776 …#define DSP2_DDE_PCM_DRAM_BASE DSP2_DM_PREFETCH_DRAM_BASE+0x400 // AC3 Encod…
661 #define DSP2_DM_PREFETCH_DRAM_BASE 0x00A800 macro665 …#define DSP2_DDE_PCM_DRAM_BASE DSP2_DM_PREFETCH_DRAM_BASE+0x400 // AC3 Encod…
724 …#define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) //F… macro728 …#define DSP2_DDE_PCM_DRAM_BASE (DSP2_DM_PREFETCH_DRAM_BASE+0x400) // AC3 Encode …
175 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
658 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
683 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
818 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
852 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
834 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
843 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
877 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro
840 … #define DSP2_DM_PREFETCH_DRAM_BASE (OFFSET_DM_PREFETCH_DRAM_ADDR / BYTES_IN_MIU_LINE) macro