Home
last modified time | relevance | path

Searched refs:DDR_FREQ_SET_1 (Results 1 – 7 of 7) sorted by relevance

/utopia/UTPA2-700.0.x/modules/miu/hal/maldives/miu/
H A DregMIU.h128 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DregMIU.h133 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DregMIU.h128 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DregMIU.h128 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DregMIU.h136 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DregMIU.h136 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DregMIU.h133 #define DDR_FREQ_SET_1 (MIU_REG_BASE+0x21) //0x1221 macro