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Searched refs:CLKGEN2_REG_BASE (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h451 #define CLKGEN2_REG_BASE (0x0A00) macro
533 #define REG_TOP_CKG_EVD_PPU (CLKGEN2_REG_BASE+(0x001c<<1))
573 #define REG_TOP_CKG_EVD_LITE (CLKGEN2_REG_BASE+(0x0017<<1))
586 #define REG_TOP_CKG_EVD_PPU_LITE (CLKGEN2_REG_BASE+(0x0017<<1))
599 #define REG_TOP_HVD_AEC_LITE (CLKGEN2_REG_BASE+(0x0018<<1))
609 #define REG_TOP_HVD_IDB (CLKGEN2_REG_BASE+(0x001a<<1))
615 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1))
625 #define REG_TOP_VP8 (CLKGEN2_REG_BASE+(0x001d<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h597 #define CLKGEN2_REG_BASE (0x0A00) macro
679 #define REG_TOP_CKG_EVD_PPU (CLKGEN2_REG_BASE+(0x001c<<1))
718 #define REG_TOP_HVD_AEC_LITE (CLKGEN2_REG_BASE+(0x0018<<1))
728 #define REG_TOP_HVD_IDB (CLKGEN2_REG_BASE+(0x001a<<1))
734 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1))
744 #define REG_TOP_VP8 (CLKGEN2_REG_BASE+(0x001d<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h597 #define CLKGEN2_REG_BASE (0x0A00) macro
679 #define REG_TOP_CKG_EVD_PPU (CLKGEN2_REG_BASE+(0x001c<<1))
718 #define REG_TOP_HVD_AEC_LITE (CLKGEN2_REG_BASE+(0x0018<<1))
728 #define REG_TOP_HVD_IDB (CLKGEN2_REG_BASE+(0x001a<<1))
734 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1))
744 #define REG_TOP_VP8 (CLKGEN2_REG_BASE+(0x001d<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DregHVD_EX.h597 #define CLKGEN2_REG_BASE (0x0A00) macro
680 #define REG_TOP_CKG_EVD_PPU (CLKGEN2_REG_BASE+(0x001c<<1))
719 #define REG_TOP_HVD_AEC_LITE (CLKGEN2_REG_BASE+(0x0018<<1))
730 #define REG_TOP_HVD_IDB (CLKGEN2_REG_BASE+(0x001a<<1))
737 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1))
748 #define REG_TOP_VP8 (CLKGEN2_REG_BASE+(0x001d<<1))
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DregMVOP.h116 #define CLKGEN2_REG_BASE 0x0A00 //chiptop CLKGEN02 macro
512 #define REG_CKG2_FBDEC_L (CLKGEN2_REG_BASE + 0xD6)
523 #define REG_CKG2_FBDEC_H (CLKGEN2_REG_BASE + 0xD6)
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DregVPU_EX.h394 #define CLKGEN2_REG_BASE (0x0A00) macro